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sayma: fix DDMTD STA

This commit is contained in:
Sebastien Bourdeauducq 2019-01-25 23:39:19 +08:00
parent cb04230f86
commit 359fb1f207
1 changed files with 4 additions and 0 deletions
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4
artiq/gateware/targets/sayma_amc.py
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@ -283,6 +283,8 @@ class MasterDAC(MiniSoC, AMPSoC, RTMCommon):
self.submodules.sysref_ddmtd = jesd204_tools.DDMTD(platform.request("adc_sysref")) self.submodules.sysref_ddmtd = jesd204_tools.DDMTD(platform.request("adc_sysref"))
self.csr_devices.append("sysref_ddmtd") self.csr_devices.append("sysref_ddmtd")
platform.add_false_path_constraints(self.ad9154_crg.cd_jesd.clk,
self.sysref_ddmtd.cd_helper.clk)
self.submodules.sysref_sampler = jesd204_tools.SysrefSampler( self.submodules.sysref_sampler = jesd204_tools.SysrefSampler(
platform.request("dac_sysref"), self.rtio_tsc.coarse_ts) platform.request("dac_sysref"), self.rtio_tsc.coarse_ts)
self.csr_devices.append("sysref_sampler") self.csr_devices.append("sysref_sampler")
@ -576,6 +578,8 @@ class Satellite(BaseSoC, RTMCommon):
self.submodules.sysref_ddmtd = jesd204_tools.DDMTD(platform.request("adc_sysref")) self.submodules.sysref_ddmtd = jesd204_tools.DDMTD(platform.request("adc_sysref"))
self.csr_devices.append("sysref_ddmtd") self.csr_devices.append("sysref_ddmtd")
platform.add_false_path_constraints(self.ad9154_crg.cd_jesd.clk,
self.sysref_ddmtd.cd_helper.clk)
self.submodules.sysref_sampler = jesd204_tools.SysrefSampler( self.submodules.sysref_sampler = jesd204_tools.SysrefSampler(
platform.request("dac_sysref"), self.rtio_tsc.coarse_ts) platform.request("dac_sysref"), self.rtio_tsc.coarse_ts)
self.csr_devices.append("sysref_sampler") self.csr_devices.append("sysref_sampler")