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artiq
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almazny: fix missing (but unused) core

This commit is contained in:
mwojcik 2022-04-27 17:31:44 +08:00
parent d6f1c5984a
commit 3160378614
1 changed files with 3 additions and 1 deletions
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artiq/coredevice/mirny.py
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@ -193,6 +193,7 @@ class Almazny:
:param host_mirny - Mirny device Almazny is connected to
"""
core: KernelInvariant[Core]
mirny_cpld: KernelInvariant[Mirny]
att_mu: Kernel[list[int32]]
channel_sw: Kernel[list[int32]]
@ -200,6 +201,7 @@ class Almazny:
def __init__(self, dmgr, host_mirny):
self.mirny_cpld = dmgr.get(host_mirny)
self.core = self.mirny_cpld.core
self.att_mu = [0x3f] * 4
self.channel_sw = [0] * 4
self.output_enable = False