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rtio/wishbone: make replace configurable

This commit is contained in:
Sebastien Bourdeauducq 2016-03-10 09:44:05 +08:00
parent 03b53c3af9
commit 2e39802a61
1 changed files with 2 additions and 2 deletions
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4
artiq/gateware/rtio/phy/wishbone.py
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@ -5,7 +5,7 @@ from artiq.gateware.rtio import rtlink
class RT2WB(Module):
def __init__(self, address_width, wb=None):
def __init__(self, address_width, wb=None, rtio_enable_replace=False):
if wb is None:
wb = wishbone.Interface()
self.wb = wb
@ -14,7 +14,7 @@ class RT2WB(Module):
len(wb.dat_w),
address_width + 1,
suppress_nop=False,
enable_replace=False),
enable_replace=rtio_enable_replace),
rtlink.IInterface(
len(wb.dat_r),
timestamped=False)