From 2d62a89143ab07f71f2d395a4318525e21e53ef7 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Wed, 23 Nov 2016 23:23:27 +0800 Subject: [PATCH] rtio: use large data register --- artiq/gateware/rtio/cri.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/artiq/gateware/rtio/cri.py b/artiq/gateware/rtio/cri.py index 1e9dd40d2..62e354a39 100644 --- a/artiq/gateware/rtio/cri.py +++ b/artiq/gateware/rtio/cri.py @@ -61,7 +61,7 @@ class KernelInitiator(Module, AutoCSR): self.reset_phy = CSR() self.chan_sel = CSRStorage(24) - self.o_data = CSRStorage(32, write_from_dev=True) # XXX -> 512 + self.o_data = CSRStorage(512, write_from_dev=True) self.o_address = CSRStorage(16) self.o_timestamp = CSRStorage(64) self.o_we = CSR()