mirror of https://github.com/m-labs/artiq.git
cri: add note about clearing of o_data
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@ -55,6 +55,7 @@ unsafe fn process_exceptional_status(timestamp: i64, channel: i32, status: u32)
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pub extern fn output(timestamp: i64, channel: i32, addr: i32, data: i32) {
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pub extern fn output(timestamp: i64, channel: i32, addr: i32, data: i32) {
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unsafe {
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unsafe {
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csr::rtio::chan_sel_write(channel as u32);
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csr::rtio::chan_sel_write(channel as u32);
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// writing timestamp clears o_data
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csr::rtio::timestamp_write(timestamp as u64);
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csr::rtio::timestamp_write(timestamp as u64);
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csr::rtio::o_address_write(addr as u32);
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csr::rtio::o_address_write(addr as u32);
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rtio_o_data_write(0, data as u32);
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rtio_o_data_write(0, data as u32);
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@ -69,6 +70,7 @@ pub extern fn output(timestamp: i64, channel: i32, addr: i32, data: i32) {
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pub extern fn output_wide(timestamp: i64, channel: i32, addr: i32, data: CSlice<i32>) {
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pub extern fn output_wide(timestamp: i64, channel: i32, addr: i32, data: CSlice<i32>) {
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unsafe {
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unsafe {
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csr::rtio::chan_sel_write(channel as u32);
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csr::rtio::chan_sel_write(channel as u32);
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// writing timestamp clears o_data
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csr::rtio::timestamp_write(timestamp as u64);
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csr::rtio::timestamp_write(timestamp as u64);
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csr::rtio::o_address_write(addr as u32);
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csr::rtio::o_address_write(addr as u32);
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for i in 0..data.len() {
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for i in 0..data.len() {
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@ -49,7 +49,9 @@ class KernelInitiator(Module, AutoCSR):
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self.chan_sel = CSRStorage(24)
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self.chan_sel = CSRStorage(24)
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self.timestamp = CSRStorage(64)
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self.timestamp = CSRStorage(64)
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# writing timestamp set o_data to 0
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# Writing timestamp clears o_data. This implements automatic
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# zero-extension of output event data by the gateware. When staging an
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# output event, always write timestamp before o_data.
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self.o_data = CSRStorage(512, write_from_dev=True)
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self.o_data = CSRStorage(512, write_from_dev=True)
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self.o_address = CSRStorage(16)
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self.o_address = CSRStorage(16)
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self.o_we = CSR()
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self.o_we = CSR()
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