M-Labs/artiq
2
0
Fork 2
mirror of https://github.com/m-labs/artiq.git synced 2024-12-25 03:08:27 +08:00
Code Issues Projects Releases Wiki Activity

cri: add note about clearing of o_data

Browse Source
This commit is contained in:
Robert Jördens 2017-06-16 19:06:00 +02:00
parent 10fb6c6216
commit 2a76034fbc
2 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
artiq/firmware/ksupport/rtio.rs
View File

@ -55,6 +55,7 @@ unsafe fn process_exceptional_status(timestamp: i64, channel: i32, status: u32)
pub extern fn output(timestamp: i64, channel: i32, addr: i32, data: i32) {
unsafe {
csr::rtio::chan_sel_write(channel as u32);
// writing timestamp clears o_data
csr::rtio::timestamp_write(timestamp as u64);
csr::rtio::o_address_write(addr as u32);
rtio_o_data_write(0, data as u32);
@ -69,6 +70,7 @@ pub extern fn output(timestamp: i64, channel: i32, addr: i32, data: i32) {
pub extern fn output_wide(timestamp: i64, channel: i32, addr: i32, data: CSlice<i32>) {
unsafe {
csr::rtio::chan_sel_write(channel as u32);
// writing timestamp clears o_data
csr::rtio::timestamp_write(timestamp as u64);
csr::rtio::o_address_write(addr as u32);
for i in 0..data.len() {

4
artiq/gateware/rtio/cri.py
View File

@ -49,7 +49,9 @@ class KernelInitiator(Module, AutoCSR):
self.chan_sel = CSRStorage(24)
self.timestamp = CSRStorage(64)
# writing timestamp set o_data to 0
# Writing timestamp clears o_data. This implements automatic
# zero-extension of output event data by the gateware. When staging an
# output event, always write timestamp before o_data.
self.o_data = CSRStorage(512, write_from_dev=True)
self.o_address = CSRStorage(16)
self.o_we = CSR()