M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity

gateware: fix aeb1ba847

This commit is contained in:
Sebastien Bourdeauducq 2017-01-18 17:11:02 -06:00
parent 5c0d402ef3
commit 28a41a2f60
4 changed files with 0 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
artiq/gateware/targets/kc705_dds.py
View File

@ -111,7 +111,6 @@ class _NIST_Ions(MiniSoC, AMPSoC):
cpu_type=cpu_type,
sdram_controller_type="minicon",
l2_size=128*1024,
with_timer=False,
ident=artiq_version,
**kwargs)
AMPSoC.__init__(self)

1
artiq/gateware/targets/kc705_drtio_master.py
View File

@ -32,7 +32,6 @@ class Master(MiniSoC, AMPSoC):
cpu_type="or1k",
sdram_controller_type="minicon",
l2_size=128*1024,
with_timer=False,
ident=artiq_version,
**kwargs)
AMPSoC.__init__(self)

1
artiq/gateware/targets/phaser.py
View File

@ -168,7 +168,6 @@ class Phaser(MiniSoC, AMPSoC):
cpu_type=cpu_type,
sdram_controller_type="minicon",
l2_size=128*1024,
with_timer=False,
ident=artiq_version,
**kwargs)
AMPSoC.__init__(self)

1
artiq/gateware/targets/pipistrello.py
View File

@ -158,7 +158,6 @@ class Demo(BaseSoC, AMPSoC):
BaseSoC.__init__(self,
cpu_type=cpu_type,
l2_size=64*1024,
with_timer=False,
ident=artiq_version,
clk_freq=75*1000*1000,
**kwargs)