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devices/dds_core: rename rtio_channel to rtio_switch

This commit is contained in:
Sebastien Bourdeauducq 2014-10-16 23:36:28 +08:00
parent 00a6de2245
commit 27d1a5ffb9
4 changed files with 14 additions and 14 deletions
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6
artiq/devices/dds_core.py
View File

@ -13,15 +13,15 @@ class DDS(AutoContext):
:param dds_sysclk: DDS system frequency, used for computing the frequency :param dds_sysclk: DDS system frequency, used for computing the frequency
tuning words. tuning words.
:param reg_channel: channel number of the DDS device to control. :param reg_channel: channel number of the DDS device to control.
:param rtio_channel: RTIO channel number of the RF switch associated with :param rtio_switch: RTIO channel number of the RF switch associated with
the DDS device. the DDS device.
""" """
parameters = "dds_sysclk reg_channel rtio_channel" parameters = "dds_sysclk reg_channel rtio_switch"
def build(self): def build(self):
self.previous_frequency = 0*MHz self.previous_frequency = 0*MHz
self.sw = rtio_core.RTIOOut(self, channel=self.rtio_channel) self.sw = rtio_core.RTIOOut(self, channel=self.rtio_switch)
kernel_attr = "previous_frequency" kernel_attr = "previous_frequency"

8
examples/compiler_test.py
View File

@ -36,13 +36,13 @@ def main():
exp = CompilerTest( exp = CompilerTest(
core=coredev, core=coredev,
a=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, a=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=0, rtio_channel=0), reg_channel=0, rtio_switch=0),
b=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, b=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=1, rtio_channel=1), reg_channel=1, rtio_switch=1),
A=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, A=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=2, rtio_channel=2), reg_channel=2, rtio_switch=2),
B=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, B=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=3, rtio_channel=3) reg_channel=3, rtio_switch=3)
) )
exp.run(3, 100*us) exp.run(3, 100*us)

10
examples/dds_test.py
View File

@ -28,14 +28,14 @@ def main():
exp = DDSTest( exp = DDSTest(
core=coredev, core=coredev,
a=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, a=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=0, rtio_channel=0), reg_channel=0, rtio_switch=0),
b=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, b=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=1, rtio_channel=1), reg_channel=1, rtio_switch=1),
c=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, c=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=2, rtio_channel=2), reg_channel=2, rtio_switch=2),
d=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, d=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=3, rtio_channel=3), reg_channel=3, rtio_switch=3),
led=gpio_core.GPIOOut(core=coredev, channel=1) led=gpio_core.GPIOOut(core=coredev, channel=0)
) )
exp.run() exp.run()

4
examples/photon_histogram.py
View File

@ -41,9 +41,9 @@ def main():
exp = PhotonHistogram( exp = PhotonHistogram(
core=coredev, core=coredev,
bd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, bd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=0, rtio_channel=1), reg_channel=0, rtio_switch=1),
bdd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz, bdd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
reg_channel=1, rtio_channel=2), reg_channel=1, rtio_switch=2),
pmt=rtio_core.RTIOIn(core=coredev, channel=0), pmt=rtio_core.RTIOIn(core=coredev, channel=0),
repeats=100, repeats=100,
nbins=100 nbins=100