mirror of https://github.com/m-labs/artiq.git
devices/dds_core: rename rtio_channel to rtio_switch
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@ -13,15 +13,15 @@ class DDS(AutoContext):
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:param dds_sysclk: DDS system frequency, used for computing the frequency
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tuning words.
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:param reg_channel: channel number of the DDS device to control.
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:param rtio_channel: RTIO channel number of the RF switch associated with
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:param rtio_switch: RTIO channel number of the RF switch associated with
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the DDS device.
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"""
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parameters = "dds_sysclk reg_channel rtio_channel"
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parameters = "dds_sysclk reg_channel rtio_switch"
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def build(self):
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self.previous_frequency = 0*MHz
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self.sw = rtio_core.RTIOOut(self, channel=self.rtio_channel)
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self.sw = rtio_core.RTIOOut(self, channel=self.rtio_switch)
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kernel_attr = "previous_frequency"
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@ -36,13 +36,13 @@ def main():
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exp = CompilerTest(
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core=coredev,
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a=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=0, rtio_channel=0),
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reg_channel=0, rtio_switch=0),
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b=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=1, rtio_channel=1),
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reg_channel=1, rtio_switch=1),
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A=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=2, rtio_channel=2),
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reg_channel=2, rtio_switch=2),
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B=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=3, rtio_channel=3)
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reg_channel=3, rtio_switch=3)
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)
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exp.run(3, 100*us)
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@ -28,14 +28,14 @@ def main():
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exp = DDSTest(
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core=coredev,
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a=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=0, rtio_channel=0),
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reg_channel=0, rtio_switch=0),
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b=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=1, rtio_channel=1),
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reg_channel=1, rtio_switch=1),
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c=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=2, rtio_channel=2),
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reg_channel=2, rtio_switch=2),
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d=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=3, rtio_channel=3),
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led=gpio_core.GPIOOut(core=coredev, channel=1)
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reg_channel=3, rtio_switch=3),
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led=gpio_core.GPIOOut(core=coredev, channel=0)
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)
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exp.run()
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@ -41,9 +41,9 @@ def main():
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exp = PhotonHistogram(
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core=coredev,
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bd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=0, rtio_channel=1),
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reg_channel=0, rtio_switch=1),
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bdd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=1, rtio_channel=2),
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reg_channel=1, rtio_switch=2),
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pmt=rtio_core.RTIOIn(core=coredev, channel=0),
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repeats=100,
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nbins=100
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