From 276b0c7f06d32655f6a5debd8573273cf2a580bf Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Tue, 20 Mar 2018 07:27:51 +0800 Subject: [PATCH] sdram: reject read delay wrap arounds --- artiq/firmware/libboard/sdram.rs | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/artiq/firmware/libboard/sdram.rs b/artiq/firmware/libboard/sdram.rs index 9e7133095..15f17af8e 100644 --- a/artiq/firmware/libboard/sdram.rs +++ b/artiq/firmware/libboard/sdram.rs @@ -321,6 +321,8 @@ mod ddr { let mut min_delay = 0; let mut have_min_delay = false; let mut max_delay = 0; + let mut have_max_delay = false; + let mut have_invalid = 0; ddrphy::rdly_dq_rst_write(1); @@ -328,7 +330,7 @@ mod ddr { let mut valid = true; for _ in 0..256 { sdram_phy::command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS| - DFII_COMMAND_RDDATA); + DFII_COMMAND_RDDATA); spin_cycles(15); for p in 0..DFII_NPHASES { @@ -347,7 +349,14 @@ mod ddr { min_delay = delay; have_min_delay = true; } - max_delay = delay; + if !have_max_delay { + max_delay = delay; + } + } else if have_min_delay { + have_invalid += 1; + if have_invalid >= 10 { + have_max_delay = true; + } } ddrphy::rdly_dq_inc_write(1); }