From 26e7f68b5dbd4a256118da5c2344ffada9c098cc Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sun, 1 Jan 2017 18:23:27 +0100 Subject: [PATCH] firmware: move clock to libboard --- artiq/firmware/libboard/ad9154.rs | 15 ++++++++------- artiq/firmware/{runtime => libboard}/clock.rs | 2 +- artiq/firmware/libboard/lib.rs | 1 + artiq/firmware/runtime/lib.rs | 11 +++++------ artiq/firmware/runtime/logger.rs | 6 +++--- artiq/firmware/runtime/rtio_mgt.rs | 3 +-- artiq/firmware/runtime/sched.rs | 6 +++--- artiq/firmware/runtime/session.rs | 6 +++--- 8 files changed, 25 insertions(+), 25 deletions(-) rename artiq/firmware/{runtime => libboard}/clock.rs (99%) diff --git a/artiq/firmware/libboard/ad9154.rs b/artiq/firmware/libboard/ad9154.rs index 83b6eeacf..3df84ac8d 100644 --- a/artiq/firmware/libboard/ad9154.rs +++ b/artiq/firmware/libboard/ad9154.rs @@ -1,4 +1,5 @@ use csr; +use clock; mod ad9154_reg; fn spi_setup() { @@ -133,13 +134,13 @@ fn dac_setup() -> Result<(), &'static str> { 0*ad9154_reg::LSBFIRST_M | 0*ad9154_reg::LSBFIRST | 0*ad9154_reg::ADDRINC_M | 0*ad9154_reg::ADDRINC | 1*ad9154_reg::SDOACTIVE_M | 1*ad9154_reg::SDOACTIVE); - busywait_us(100); + clock::spin_us(100); write(ad9154_reg::SPI_INTFCONFA, 0*ad9154_reg::SOFTRESET_M | 0*ad9154_reg::SOFTRESET | 0*ad9154_reg::LSBFIRST_M | 0*ad9154_reg::LSBFIRST | 0*ad9154_reg::ADDRINC_M | 0*ad9154_reg::ADDRINC | 1*ad9154_reg::SDOACTIVE_M | 1*ad9154_reg::SDOACTIVE); - busywait_us(100); + clock::spin_us(100); if read(ad9154_reg::PRODIDH) as u16 << 8 | read(ad9154_reg::PRODIDL) as u16 != 0x9154 { return Err("AD9154 not found") @@ -149,7 +150,7 @@ fn dac_setup() -> Result<(), &'static str> { 0*ad9154_reg::PD_DAC0 | 0*ad9154_reg::PD_DAC1 | 0*ad9154_reg::PD_DAC2 | 0*ad9154_reg::PD_DAC3 | 0*ad9154_reg::PD_BG); - busywait_us(100); + clock::spin_us(100); write(ad9154_reg::TXENMASK1, 0*ad9154_reg::DACA_MASK | 0*ad9154_reg::DACB_MASK); // TX not controlled by TXEN pins write(ad9154_reg::CLKCFG0, @@ -348,7 +349,7 @@ fn dac_setup() -> Result<(), &'static str> { 0x9*ad9154_reg::SYNCMODE | 1*ad9154_reg::SYNCENABLE | 1*ad9154_reg::SYNCARM | 0*ad9154_reg::SYNCCLRSTKY | 0*ad9154_reg::SYNCCLRLAST); - busywait_us(1000); // ensure at least one sysref edge + clock::spin_us(1000); // ensure at least one sysref edge if read(ad9154_reg::SYNC_STATUS) & ad9154_reg::SYNC_LOCK == 0: return Err("no sync lock") write(ad9154_reg::XBAR_LN_0_1, @@ -413,15 +414,15 @@ fn cfg() -> Result<(), &'static str> { jesd_enable(false); jesd_prbs(false); jesd_stpl(false); - busywait_us(10000); + clock::spin_us(10000); jesd_enable(true); dac_setup(); jesd_enable(false); - busywait_us(10000); + clock::spin_us(10000); jesd_enable(true); monitor(); while !jesd_ready() {} - busywait_us(10000); + clock::spin_us(10000); if read(ad9154_reg::CODEGRPSYNCFLG) != 0x0f { return Err("bad CODEGRPSYNCFLG") } diff --git a/artiq/firmware/runtime/clock.rs b/artiq/firmware/libboard/clock.rs similarity index 99% rename from artiq/firmware/runtime/clock.rs rename to artiq/firmware/libboard/clock.rs index 19bfa6c9c..31fe7bafc 100644 --- a/artiq/firmware/runtime/clock.rs +++ b/artiq/firmware/libboard/clock.rs @@ -1,4 +1,4 @@ -use board::csr; +use csr; const INIT: u64 = ::core::i64::MAX as u64; const FREQ: u64 = csr::CONFIG_CLOCK_FREQUENCY as u64; diff --git a/artiq/firmware/libboard/lib.rs b/artiq/firmware/libboard/lib.rs index de313a998..2a5147b25 100644 --- a/artiq/firmware/libboard/lib.rs +++ b/artiq/firmware/libboard/lib.rs @@ -7,6 +7,7 @@ include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs")); include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs")); pub mod spr; pub mod irq; +pub mod clock; extern { pub fn flush_cpu_dcache(); diff --git a/artiq/firmware/runtime/lib.rs b/artiq/firmware/runtime/lib.rs index 0eaeb6a95..2bbf2f538 100644 --- a/artiq/firmware/runtime/lib.rs +++ b/artiq/firmware/runtime/lib.rs @@ -58,7 +58,6 @@ pub extern fn panic_fmt(args: self::core::fmt::Arguments, file: &'static str, li } mod config; -mod clock; mod rtio_mgt; mod mailbox; mod rpc_queue; @@ -102,14 +101,14 @@ pub unsafe extern fn rust_main() { static mut LOG_BUFFER: [u8; 65536] = [0; 65536]; BufferLogger::new(&mut LOG_BUFFER[..]) .register(move || { - clock::init(); + board::clock::init(); info!("booting ARTIQ"); info!("software version {}", GIT_COMMIT); info!("gateware version {}", board::ident(&mut [0; 64])); - let t = clock::get_ms(); + let t = board::clock::get_ms(); info!("press 'e' to erase startup and idle kernels..."); - while clock::get_ms() < t + 1000 { + while board::clock::get_ms() < t + 1000 { if readchar_nonblock() != 0 && readchar() == b'e' as libc::c_char { config::remove("startup_kernel"); config::remove("idle_kernel"); @@ -149,10 +148,10 @@ pub unsafe extern fn isr() { #[no_mangle] pub fn sys_now() -> u32 { - clock::get_ms() as u32 + board::clock::get_ms() as u32 } #[no_mangle] pub fn sys_jiffies() -> u32 { - clock::get_ms() as u32 + board::clock::get_ms() as u32 } diff --git a/artiq/firmware/runtime/logger.rs b/artiq/firmware/runtime/logger.rs index e4093e48a..4177f8e24 100644 --- a/artiq/firmware/runtime/logger.rs +++ b/artiq/firmware/runtime/logger.rs @@ -2,7 +2,7 @@ use core::{mem, ptr}; use core::cell::{Cell, RefCell}; use log::{self, Log, LogLevel, LogMetadata, LogRecord, LogLevelFilter}; use log_buffer::LogBuffer; -use clock; +use board; pub struct BufferLogger { buffer: RefCell>, @@ -70,13 +70,13 @@ impl Log for BufferLogger { use core::fmt::Write; writeln!(self.buffer.borrow_mut(), "[{:12}us] {:>5}({}): {}", - clock::get_us(), record.level(), record.target(), record.args()).unwrap(); + board::clock::get_us(), record.level(), record.target(), record.args()).unwrap(); // Printing to UART is really slow, so avoid doing that when we have an alternative // route to retrieve the debug messages. if self.trace_to_uart.get() || record.level() <= LogLevel::Info { println!("[{:12}us] {:>5}({}): {}", - clock::get_us(), record.level(), record.target(), record.args()); + board::clock::get_us(), record.level(), record.target(), record.args()); } } } diff --git a/artiq/firmware/runtime/rtio_mgt.rs b/artiq/firmware/runtime/rtio_mgt.rs index 216706f0a..ed25ea03b 100644 --- a/artiq/firmware/runtime/rtio_mgt.rs +++ b/artiq/firmware/runtime/rtio_mgt.rs @@ -4,8 +4,7 @@ use sched::Scheduler; #[cfg(has_rtio_crg)] pub mod crg { - use clock; - use board::csr; + use board::{clock, csr}; pub fn init() { unsafe { csr::rtio_crg::pll_reset_write(0) } diff --git a/artiq/firmware/runtime/sched.rs b/artiq/firmware/runtime/sched.rs index 570541eca..920767664 100644 --- a/artiq/firmware/runtime/sched.rs +++ b/artiq/firmware/runtime/sched.rs @@ -6,7 +6,7 @@ use std::io::{Read, Write, Result, Error, ErrorKind}; use fringe::OwnedStack; use fringe::generator::{Generator, Yielder, State as GeneratorState}; use lwip; -use clock; +use board; use urc::Urc; #[derive(Debug)] @@ -106,7 +106,7 @@ impl Scheduler { if self.threads.len() == 0 { return } - let now = clock::get_ms(); + let now = board::clock::get_ms(); let start_index = self.index; loop { @@ -216,7 +216,7 @@ pub struct Waiter<'a>(&'a Yielder); impl<'a> Waiter<'a> { pub fn sleep(&self, duration_ms: u64) -> Result<()> { let request = WaitRequest { - timeout: Some(clock::get_ms() + duration_ms), + timeout: Some(board::clock::get_ms() + duration_ms), event: None }; diff --git a/artiq/firmware/runtime/session.rs b/artiq/firmware/runtime/session.rs index e4458398a..52617ef08 100644 --- a/artiq/firmware/runtime/session.rs +++ b/artiq/firmware/runtime/session.rs @@ -3,7 +3,7 @@ use std::{mem, str}; use std::cell::RefCell; use std::io::{self, Read, Write, BufWriter}; use std::btree_set::BTreeSet; -use {config, rtio_mgt, clock, mailbox, rpc_queue, kernel}; +use {config, rtio_mgt, mailbox, rpc_queue, kernel}; use logger::BufferLogger; use cache::Cache; use urc::Urc; @@ -58,7 +58,7 @@ enum KernelState { struct Session<'a> { congress: &'a mut Congress, kernel_state: KernelState, - watchdog_set: clock::WatchdogSet, + watchdog_set: board::clock::WatchdogSet, log_buffer: String, interner: BTreeSet } @@ -68,7 +68,7 @@ impl<'a> Session<'a> { Session { congress: congress, kernel_state: KernelState::Absent, - watchdog_set: clock::WatchdogSet::new(), + watchdog_set: board::clock::WatchdogSet::new(), log_buffer: String::new(), interner: BTreeSet::new() }