mirror of https://github.com/m-labs/artiq.git
firmware: use aux ping to determine when DRTIO satellite is ready
This commit is contained in:
parent
a8ea557406
commit
257527629a
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@ -52,6 +52,16 @@ name = "cslice"
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version = "0.3.0"
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version = "0.3.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "drtioaux"
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version = "0.0.0"
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dependencies = [
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"board 0.0.0",
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"byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
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"std_artiq 0.0.0",
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]
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[[package]]
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[[package]]
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name = "fringe"
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name = "fringe"
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version = "1.1.0"
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version = "1.1.0"
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@ -125,6 +135,7 @@ dependencies = [
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"byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"byteorder 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins?rev=631b568)",
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"compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins?rev=631b568)",
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"cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"drtioaux 0.0.0",
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"fringe 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"fringe 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
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"log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
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"logger_artiq 0.0.0",
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"logger_artiq 0.0.0",
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@ -145,6 +156,7 @@ dependencies = [
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"board 0.0.0",
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"board 0.0.0",
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"build_artiq 0.0.0",
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"build_artiq 0.0.0",
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"compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins)",
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"compiler_builtins 0.1.0 (git+https://github.com/rust-lang-nursery/compiler-builtins)",
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"drtioaux 0.0.0",
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"log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
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"log 0.3.6 (registry+https://github.com/rust-lang/crates.io-index)",
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"logger_artiq 0.0.0",
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"logger_artiq 0.0.0",
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"std_artiq 0.0.0",
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"std_artiq 0.0.0",
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@ -19,6 +19,7 @@ logger_artiq = { path = "../liblogger_artiq" }
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cslice = { version = "0.3" }
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cslice = { version = "0.3" }
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log = { version = "0.3", default-features = false, features = ["max_level_debug"] }
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log = { version = "0.3", default-features = false, features = ["max_level_debug"] }
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board = { path = "../libboard", features = ["uart_console"] }
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board = { path = "../libboard", features = ["uart_console"] }
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drtioaux = { path = "../libdrtioaux" }
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fringe = { version = "= 1.1.0", default-features = false, features = ["alloc"] }
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fringe = { version = "= 1.1.0", default-features = false, features = ["alloc"] }
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byteorder = { version = "1.0", default-features = false }
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byteorder = { version = "1.0", default-features = false }
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@ -14,6 +14,8 @@ extern crate fringe;
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extern crate smoltcp;
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extern crate smoltcp;
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#[macro_use]
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#[macro_use]
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extern crate board;
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extern crate board;
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#[cfg(has_drtio)]
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extern crate drtioaux;
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use std::boxed::Box;
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use std::boxed::Box;
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use smoltcp::wire::{EthernetAddress, IpAddress};
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use smoltcp::wire::{EthernetAddress, IpAddress};
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@ -39,12 +39,27 @@ pub mod crg {
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#[cfg(has_drtio)]
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#[cfg(has_drtio)]
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mod drtio {
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mod drtio {
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use super::*;
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use super::*;
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use drtioaux;
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pub fn startup(io: &Io) {
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pub fn startup(io: &Io) {
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io.spawn(4096, link_thread);
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io.spawn(4096, link_thread);
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io.spawn(4096, error_thread);
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io.spawn(4096, error_thread);
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}
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}
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static mut LINK_RUNNING: bool = false;
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fn link_set_running(running: bool) {
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unsafe {
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LINK_RUNNING = running
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}
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}
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fn link_is_running() -> bool {
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unsafe {
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LINK_RUNNING
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}
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}
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fn link_is_up() -> bool {
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fn link_is_up() -> bool {
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unsafe {
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unsafe {
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csr::drtio::link_status_read() == 1
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csr::drtio::link_status_read() == 1
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@ -80,7 +95,7 @@ mod drtio {
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}
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}
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pub fn init() {
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pub fn init() {
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if link_is_up() {
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if link_is_running() {
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unsafe {
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unsafe {
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csr::drtio::reset_write(1);
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csr::drtio::reset_write(1);
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while csr::drtio::o_wait_read() == 1 {}
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while csr::drtio::o_wait_read() == 1 {}
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@ -91,20 +106,40 @@ mod drtio {
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}
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}
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}
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}
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fn ping_remote(io: &Io) -> u32 {
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let mut count = 0;
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loop {
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if !link_is_up() {
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return 0
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}
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count += 1;
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drtioaux::send_packet(&drtioaux::Packet::EchoRequest).unwrap();
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io.sleep(100).unwrap();
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let pr = drtioaux::recv_packet();
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match pr {
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Ok(Some(drtioaux::Packet::EchoReply)) => return count,
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_ => {}
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}
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}
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}
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pub fn link_thread(io: Io) {
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pub fn link_thread(io: Io) {
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loop {
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loop {
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io.until(link_is_up).unwrap();
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io.until(link_is_up).unwrap();
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info!("link RX is up");
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info!("link RX is up, pinging");
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io.sleep(10000).unwrap();
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info!("wait for remote side done");
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let ping_count = ping_remote(&io);
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if ping_count > 0 {
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info!("remote replied after {} packets", ping_count);
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link_set_running(true);
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init(); // clear all FIFOs first
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init(); // clear all FIFOs first
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reset_phy();
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reset_phy();
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sync_tsc();
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sync_tsc();
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info!("link initialization completed");
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info!("link initialization completed");
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}
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io.until(|| !link_is_up()).unwrap();
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io.until(|| !link_is_up()).unwrap();
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link_set_running(false);
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info!("link is down");
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info!("link is down");
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}
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}
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}
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}
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@ -17,6 +17,7 @@ alloc_artiq = { path = "../liballoc_artiq" }
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std_artiq = { path = "../libstd_artiq", features = ["alloc"] }
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std_artiq = { path = "../libstd_artiq", features = ["alloc"] }
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logger_artiq = { path = "../liblogger_artiq" }
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logger_artiq = { path = "../liblogger_artiq" }
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board = { path = "../libboard", features = ["uart_console"] }
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board = { path = "../libboard", features = ["uart_console"] }
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drtioaux = { path = "../libdrtioaux" }
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log = { version = "0.3", default-features = false }
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log = { version = "0.3", default-features = false }
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[dependencies.compiler_builtins]
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[dependencies.compiler_builtins]
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@ -9,6 +9,26 @@ extern crate std_artiq as std;
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extern crate log;
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extern crate log;
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extern crate logger_artiq;
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extern crate logger_artiq;
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extern crate board;
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extern crate board;
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extern crate drtioaux;
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fn process_aux_packet(p: drtioaux::Packet) {
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match p {
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drtioaux::Packet::EchoRequest => drtioaux::send_packet(&drtioaux::Packet::EchoReply).unwrap(),
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_ => warn!("received unexpected aux packet {:?}", p)
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}
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}
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fn process_aux_packets() {
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let pr = drtioaux::recv_packet();
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match pr {
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Ok(None) => {},
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Ok(Some(p)) => process_aux_packet(p),
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Err(e) => warn!("aux packet error ({})", e)
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}
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}
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#[cfg(rtio_frequency = "62.5")]
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#[cfg(rtio_frequency = "62.5")]
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const SI5324_SETTINGS: board::si5324::FrequencySettings
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const SI5324_SETTINGS: board::si5324::FrequencySettings
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@ -55,7 +75,9 @@ fn startup() {
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while !drtio_link_is_up() {}
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while !drtio_link_is_up() {}
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info!("link is up, switching to recovered clock");
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info!("link is up, switching to recovered clock");
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board::si5324::select_ext_input(true).expect("failed to switch clocks");
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board::si5324::select_ext_input(true).expect("failed to switch clocks");
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while drtio_link_is_up() {}
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while drtio_link_is_up() {
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process_aux_packets();
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}
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info!("link is down, switching to local crystal clock");
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info!("link is down, switching to local crystal clock");
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board::si5324::select_ext_input(false).expect("failed to switch clocks");
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board::si5324::select_ext_input(false).expect("failed to switch clocks");
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}
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}
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