mirror of https://github.com/m-labs/artiq.git
transforms.artiq_ir_generator: don't emit delay instruction for zero delay.
Call nodes with iodelay=Const(0) can be generated outside of `with parallel:`, where Interleaver won't and LLVMIRGenerator can't lower them.
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@ -8,7 +8,7 @@ semantics explicitly.
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from collections import OrderedDict, defaultdict
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from pythonparser import algorithm, diagnostic, ast
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from .. import types, builtins, asttyped, ir
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from .. import types, builtins, asttyped, ir, iodelay
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def _readable_name(insn):
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if isinstance(insn, ir.Constant):
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@ -1619,7 +1619,7 @@ class ARTIQIRGenerator(algorithm.Visitor):
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attr_node = node.func
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self.method_map[(attr_node.value.type, attr_node.attr)].append(insn)
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if node.iodelay is not None:
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if node.iodelay is not None and not iodelay.is_const(node.iodelay, 0):
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after_delay = self.add_block()
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self.append(ir.Delay(node.iodelay,
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{var_name: self.current_args[var_name]
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