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embedding: s/kernel_constant_attributes/kernel_invariants/g 

Requested in #359.
This commit is contained in:
whitequark 2016-04-06 22:38:31 +00:00 committed by Sebastien Bourdeauducq
parent e6666ce6a9
commit 2248a2eb9e
6 changed files with 17 additions and 15 deletions
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6
artiq/compiler/embedding.py
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@ -137,9 +137,9 @@ class ASTSynthesizer:
instance_type = types.TInstance("{}.{}".format(typ.__module__, typ.__qualname__), instance_type = types.TInstance("{}.{}".format(typ.__module__, typ.__qualname__),
OrderedDict()) OrderedDict())
instance_type.attributes['__objectid__'] = builtins.TInt32() instance_type.attributes['__objectid__'] = builtins.TInt32()
if hasattr(typ, 'kernel_constant_attributes'): if hasattr(typ, 'kernel_invariants'):
assert isinstance(typ.kernel_constant_attributes, set) assert isinstance(typ.kernel_invariants, set)
instance_type.constant_attributes = typ.kernel_constant_attributes instance_type.constant_attributes = typ.kernel_invariants
constructor_type = types.TConstructor(instance_type) constructor_type = types.TConstructor(instance_type)
constructor_type.attributes['__objectid__'] = builtins.TInt32() constructor_type.attributes['__objectid__'] = builtins.TInt32()

6
artiq/coredevice/core.py
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@ -59,9 +59,9 @@ class Core:
:param comm_device: name of the device used for communications. :param comm_device: name of the device used for communications.
""" """
kernel_constant_attributes = { kernel_invariants = {
'core', 'ref_period', 'coarse_ref_period', 'ref_multiplier', "core", "ref_period", "coarse_ref_period", "ref_multiplier",
'external_clock', "external_clock",
} }
def __init__(self, dmgr, ref_period, external_clock=False, def __init__(self, dmgr, ref_period, external_clock=False,

8
artiq/coredevice/dds.py
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@ -29,7 +29,7 @@ def dds_batch_exit() -> TNone:
class _BatchContextManager: class _BatchContextManager:
kernel_constant_attributes = {'core', 'core_dds'} kernel_invariants = {"core", "core_dds"}
def __init__(self, core_dds): def __init__(self, core_dds):
self.core_dds = core_dds self.core_dds = core_dds
@ -53,7 +53,7 @@ class CoreDDS:
phase-locked multiple of the RTIO clock. phase-locked multiple of the RTIO clock.
""" """
kernel_constant_attributes = {'core', 'sysclk', 'batch'} kernel_invariants = {"core", "sysclk", "batch"}
def __init__(self, dmgr, sysclk, core_device="core"): def __init__(self, dmgr, sysclk, core_device="core"):
self.core = dmgr.get(core_device) self.core = dmgr.get(core_device)
@ -88,8 +88,8 @@ class _DDSGeneric:
:param channel: channel number of the DDS device to control. :param channel: channel number of the DDS device to control.
""" """
kernel_constant_attributes = { kernel_invariants = {
'core', 'core_dds', 'bus_channel', 'channel', 'pow_width' "core", "core_dds", "bus_channel", "channel", "pow_width"
} }
def __init__(self, dmgr, bus_channel, channel, core_dds_device="core_dds"): def __init__(self, dmgr, bus_channel, channel, core_dds_device="core_dds"):

6
artiq/coredevice/ttl.py
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@ -10,7 +10,7 @@ class TTLOut:
:param channel: channel number :param channel: channel number
""" """
kernel_constant_attributes = {"core", "channel"} kernel_invariants = {"core", "channel"}
def __init__(self, dmgr, channel, core_device="core"): def __init__(self, dmgr, channel, core_device="core"):
self.core = dmgr.get(core_device) self.core = dmgr.get(core_device)
@ -84,7 +84,7 @@ class TTLInOut:
:param channel: channel number :param channel: channel number
""" """
kernel_constant_attributes = {"core", "channel"} kernel_invariants = {"core", "channel"}
def __init__(self, dmgr, channel, core_device="core"): def __init__(self, dmgr, channel, core_device="core"):
self.core = dmgr.get(core_device) self.core = dmgr.get(core_device)
@ -236,7 +236,7 @@ class TTLClockGen:
:param channel: channel number :param channel: channel number
""" """
kernel_constant_attributes = {"core", "channel", "acc_width"} kernel_invariants = {"core", "channel", "acc_width"}
def __init__(self, dmgr, channel, core_device="core"): def __init__(self, dmgr, channel, core_device="core"):
self.core = dmgr.get(core_device) self.core = dmgr.get(core_device)

4
artiq/test/coredevice/test_rtio.py
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@ -83,6 +83,8 @@ class ClockGeneratorLoopback(EnvExperiment):
class PulseRate(EnvExperiment): class PulseRate(EnvExperiment):
kernel_invariants = {"core", "ttl_out"}
def build(self): def build(self):
self.setattr_device("core") self.setattr_device("core")
self.setattr_device("ttl_out") self.setattr_device("ttl_out")
@ -105,7 +107,7 @@ class PulseRate(EnvExperiment):
class PulseRateDDS(EnvExperiment): class PulseRateDDS(EnvExperiment):
kernel_constant_attributes = {"core", "core_dds", "dds0", "dds1"} kernel_invariants = {"core", "core_dds", "dds0", "dds1"}
def build(self): def build(self):
self.setattr_device("core") self.setattr_device("core")

2
artiq/test/lit/embedding/error_attr_constant.py
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@ -5,7 +5,7 @@ from artiq.language.core import *
from artiq.language.types import * from artiq.language.types import *
class c: class c:
kernel_constant_attributes = {'a'} kernel_invariants = {'a'}
def __init__(self): def __init__(self):
self.a = 1 self.a = 1