mirror of https://github.com/m-labs/artiq.git
rtio: add a missing case for collision reporting
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@ -104,6 +104,9 @@ class _OutputManager(Module):
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(self.ev.timestamp[fine_ts_width:] == buf.timestamp[fine_ts_width:])
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& ((self.ev.timestamp[:fine_ts_width] != buf.timestamp[:fine_ts_width])
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|different_addresses))
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else:
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self.sync.rsys += collision.eq(
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(self.ev.timestamp == buf.timestamp) & different_addresses)
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else:
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self.sync.rsys += collision.eq(
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self.ev.timestamp[fine_ts_width:] == buf.timestamp[fine_ts_width:])
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