mirror of https://github.com/m-labs/artiq.git
test/dsp: fix rtio_output
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@ -14,8 +14,10 @@ class RTIOManager:
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def __init__(self):
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self.outputs = []
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def rtio_output(self, now, channel, addr, data):
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self.outputs.append((now, channel, addr, data))
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def rtio_output(self, target, data):
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channel = target >> 8
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addr = target & 0xff
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self.outputs.append((now_mu(), channel, addr, data))
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def rtio_output_wide(self, *args, **kwargs):
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self.rtio_output(*args, **kwargs)
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