mirror of https://github.com/m-labs/artiq.git
pdq2: implement changes in trigger/jump semantics, add unittest
The unittests now runs the compute_samples.Synthesizer against the actual gateware and verifies similarity (up to integer rounding errors).
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e870b27830
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1d5f467da7
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@ -22,14 +22,14 @@ class Segment:
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self.data = b""
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self.data = b""
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def line(self, typ, duration, data, trigger=False, silence=False,
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def line(self, typ, duration, data, trigger=False, silence=False,
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aux=False, shift=0, jump=False, clear=False, wait_trigger=False):
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aux=False, shift=0, jump=False, clear=False, wait=False):
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assert len(data) % 2 == 0, data
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assert len(data) % 2 == 0, data
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assert len(data)//2 <= 14
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assert len(data)//2 <= 14
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#assert dt*(1 << shift) > 1 + len(data)//2
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#assert dt*(1 << shift) > 1 + len(data)//2
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header = (
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header = (
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1 + len(data)//2 | (typ << 4) | (trigger << 6) | (silence << 7) |
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1 + len(data)//2 | (typ << 4) | (trigger << 6) | (silence << 7) |
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(aux << 8) | (shift << 9) | (jump << 13) | (clear << 14) |
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(aux << 8) | (shift << 9) | (jump << 13) | (clear << 14) |
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(wait_trigger << 15)
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(wait << 15)
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)
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)
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self.data += struct.pack("<HH", header, duration) + data
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self.data += struct.pack("<HH", header, duration) + data
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@ -86,7 +86,7 @@ class Segment:
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coef = self.compensate([scale*a for a in amplitude])
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coef = self.compensate([scale*a for a in amplitude])
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if phase:
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if phase:
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assert len(amplitude) == 4
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assert len(amplitude) == 4
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coef += [p*self.max_val for p in phase]
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coef += [p*self.max_val*2 for p in phase]
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data = self.pack([0, 1, 2, 2, 0, 1, 1], coef)
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data = self.pack([0, 1, 2, 2, 0, 1, 1], coef)
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self.line(typ=1, data=data, **kwargs)
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self.line(typ=1, data=data, **kwargs)
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@ -195,20 +195,23 @@ class Pdq2:
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def program(self, program):
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def program(self, program):
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self.clear_all()
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self.clear_all()
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for segment_data in program:
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for frame_data in program:
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segments = [c.new_segment() for c in self.channels]
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segments = [c.new_segment() for c in self.channels]
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for line in segment_data:
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for i, line in enumerate(frame_data): # segments are concatenated
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dac_divider = line.get("dac_divider", 1)
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dac_divider = line.get("dac_divider", 1)
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shift = int(log2(dac_divider))
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shift = int(log2(dac_divider))
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assert 2**shift == dac_divider
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assert 2**shift == dac_divider
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duration = line["duration"]
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duration = line["duration"]
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jump = line.get("jump", False)
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trigger = line.get("trigger", False)
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wait_trigger = line.get("wait_trigger", False)
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if i == 0:
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assert trigger
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trigger = False # use wait on the last line
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eof = i == len(frame_data) - 1
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for segment, data in zip(segments, line.get("channel_data")):
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for segment, data in zip(segments, line.get("channel_data")):
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assert len(data) == 1
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assert len(data) == 1
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for target, target_data in data.items():
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for target, target_data in data.items():
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getattr(segment, target)(
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getattr(segment, target)(
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shift=shift, duration=duration,
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shift=shift, duration=duration,
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wait_trigger=wait_trigger, jump=jump,
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trigger=trigger, wait=eof, jump=eof,
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**target_data)
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**target_data)
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self.write_all()
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self.write_all()
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@ -3,14 +3,16 @@ import os
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import io
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import io
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from artiq.devices.pdq2.driver import Pdq2
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from artiq.devices.pdq2.driver import Pdq2
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from artiq.wavesynth.compute_samples import Synthesizer
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pdq2_source = os.getenv("ARTIQ_PDQ2_SOURCE")
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pdq2_gateware = os.getenv("ARTIQ_PDQ2_GATEWARE")
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class TestPdq2(unittest.TestCase):
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class TestPdq2(unittest.TestCase):
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def setUp(self):
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def setUp(self):
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self.dev = Pdq2(dev=io.BytesIO())
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self.dev = Pdq2(dev=io.BytesIO())
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self.synth = Synthesizer(3, _test_program)
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def test_reset(self):
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def test_reset(self):
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self.dev.cmd("RESET", True)
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self.dev.cmd("RESET", True)
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@ -21,40 +23,77 @@ class TestPdq2(unittest.TestCase):
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# about 0.14 ms
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# about 0.14 ms
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self.dev.program(_test_program)
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self.dev.program(_test_program)
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@unittest.skipUnless(pdq2_source, "no pdq2 source and gateware")
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def test_cmd_program(self):
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def test_gateware(self):
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self.dev.cmd("START", False)
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self.dev.cmd("ARM", False)
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self.dev.cmd("ARM", False)
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self.dev.cmd("START", False)
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self.dev.program(_test_program)
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self.dev.program(_test_program)
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self.dev.cmd("START", True)
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self.dev.cmd("START", True)
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self.dev.cmd("ARM", True)
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self.dev.cmd("ARM", True)
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#self.dev.cmd("TRIGGER", True)
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#self.dev.cmd("TRIGGER", True)
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buf = self.dev.dev.getvalue()
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return self.dev.dev.getvalue()
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def test_synth(self):
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s = self.synth
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s.select(0)
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y = s.trigger()
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return list(zip(*y))
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def run_gateware(self):
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import sys
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import sys
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sys.path.append(pdq2_source)
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sys.path.append(pdq2_gateware)
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from gateware.pdq2 import Pdq2Sim
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from gateware.pdq2 import Pdq2Sim
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from migen.sim.generic import run_simulation
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from migen.sim.generic import run_simulation
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from matplotlib import pyplot as plt
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import numpy as np
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buf = self.test_cmd_program()
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tb = Pdq2Sim(buf)
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tb = Pdq2Sim(buf)
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tb.ctrl_pads.trigger.reset = 0
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tb.ctrl_pads.trigger.reset = 0
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run_simulation(tb, vcd_name="pdq2.vcd", ncycles=len(buf) + 250)
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run_simulation(tb, vcd_name="pdq2.vcd", ncycles=len(buf) + 250)
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out = np.array(tb.outputs, np.uint16).view(np.int16)
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delays = 7, 10, 30
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for outi in out[len(buf) + 100:].T:
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y = list(zip(*tb.outputs[len(buf) + 130:]))
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plt.step(np.arange(len(outi)), outi)
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y = list(zip(*(yi[di:] for yi, di in zip(y, delays))))
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self.assertGreaterEqual(len(y), 80)
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self.assertEqual(len(y[0]), 3)
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return y
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@unittest.skipUnless(pdq2_gateware, "no pdq2 gateware")
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def test_run_compare(self):
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y_ref = self.test_synth()
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y = self.run_gateware()
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for i, (yi, yi_ref) in enumerate(zip(y, y_ref)):
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for j, (yij, yij_ref) in enumerate(zip(yi, yi_ref)):
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yij = yij*20./2**16
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if yij > 10:
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yij -= 20
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self.assertAlmostEqual(yij, yij_ref, 2,
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"foo t={}, c={}".format(i, j))
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@unittest.skipUnless(pdq2_gateware, "no pdq2 gateware")
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@unittest.skip("manual/visual test")
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def test_run_plot(self):
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from matplotlib import pyplot as plt
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import numpy as np
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y_ref = self.test_synth()
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y_ref = np.array(y_ref)
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y = self.run_gateware()
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y = np.array(y, dtype=np.uint16).view(np.int16)
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y = y*20./2**16
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plt.step(np.arange(len(y)), y)
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plt.step(np.arange(len(y_ref)), y_ref, "k")
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plt.show()
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plt.show()
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_test_program = [
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_test_program = [
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[
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[
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{
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{
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"trigger": True,
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"duration": 20,
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"duration": 20,
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"channel_data": [
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"channel_data": [
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{"bias": {"amplitude": [0, 0, 2e-3]}},
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{"bias": {"amplitude": [0, 0, 2e-3]}},
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{"bias": {"amplitude": [1, 0, -7.5e-3, 7.5e-4]}},
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{"bias": {"amplitude": [1, 0, -7.5e-3, 7.5e-4]}},
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{"dds": {
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{"dds": {
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"amplitude": [0, 0, 4e-3, 0],
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"amplitude": [0, 0, 4e-3, 0],
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"phase": [.5, .05],
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"phase": [.25, .025],
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}},
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}},
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],
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],
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},
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},
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@ -68,7 +107,7 @@ _test_program = [
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}},
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}},
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{"dds": {
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{"dds": {
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"amplitude": [.8, .08, -4e-3, 0],
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"amplitude": [.8, .08, -4e-3, 0],
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"phase": [.5, .05, .04/40],
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"phase": [.25, .025, .02/40],
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"clear": True,
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"clear": True,
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}},
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}},
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],
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],
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@ -80,11 +119,9 @@ _test_program = [
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{"bias": {"amplitude": [.5, 0, -7.5e-3, 7.5e-4]}},
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{"bias": {"amplitude": [.5, 0, -7.5e-3, 7.5e-4]}},
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{"dds": {
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{"dds": {
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"amplitude": [.8, -.08, 4e-3, 0],
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"amplitude": [.8, -.08, 4e-3, 0],
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"phase": [-.5],
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"phase": [-.25],
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}},
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}},
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],
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],
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"wait_trigger": True,
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"jump": True,
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},
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},
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]
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]
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]
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]
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