mirror of https://github.com/m-labs/artiq
examples: Add edge counters to kasli_tester variant
This enables test_edge_counter on the CI system.pull/1244/head
David Nadlinger
parent
67a6882e91
commit
1c71ae636a
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@ -47,51 +47,57 @@ for i in range(8):
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"class": "TTLInOut" if i < 4 else "TTLOut",
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"arguments": {"channel": i},
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}
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device_db["ttl{}_counter".format(i)] = {
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"type": "local",
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"module": "artiq.coredevice.edge_counter",
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"class": "EdgeCounter",
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"arguments": {"channel": 8 + i},
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}
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# Urukul (EEM1) starting at RTIO channel 8
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# Urukul (EEM1) starting at RTIO channel 12
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device_db.update(
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spi_urukul0={
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 8}
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"arguments": {"channel": 12}
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},
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ttl_urukul0_sync={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLClockGen",
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"arguments": {"channel": 9, "acc_width": 4}
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"arguments": {"channel": 13, "acc_width": 4}
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},
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ttl_urukul0_io_update={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 10}
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"arguments": {"channel": 14}
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},
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ttl_urukul0_sw0={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 11}
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"arguments": {"channel": 15}
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},
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ttl_urukul0_sw1={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 12}
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"arguments": {"channel": 16}
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},
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ttl_urukul0_sw2={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 13}
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"arguments": {"channel": 17}
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},
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ttl_urukul0_sw3={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 14}
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"arguments": {"channel": 18}
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},
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urukul0_cpld={
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"type": "local",
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@ -121,24 +127,24 @@ for i in range(4):
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}
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# Sampler (EEM3) starting at RTIO channel 15
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# Sampler (EEM3) starting at RTIO channel 19
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device_db["spi_sampler0_adc"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 15}
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"arguments": {"channel": 19}
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}
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device_db["spi_sampler0_pgia"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 16}
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"arguments": {"channel": 20}
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}
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device_db["spi_sampler0_cnv"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 17},
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"arguments": {"channel": 21},
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}
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device_db["sampler0"] = {
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"type": "local",
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@ -152,24 +158,24 @@ device_db["sampler0"] = {
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}
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# Zotino (EEM4) starting at RTIO channel 18
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# Zotino (EEM4) starting at RTIO channel 22
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device_db["spi_zotino0"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 18}
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"arguments": {"channel": 22}
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}
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device_db["ttl_zotino0_ldac"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 19}
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"arguments": {"channel": 23}
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}
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device_db["ttl_zotino0_clr"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 20}
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"arguments": {"channel": 24}
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}
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device_db["zotino0"] = {
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"type": "local",
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@ -183,34 +189,34 @@ device_db["zotino0"] = {
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}
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# Grabber (EEM6) starting at RTIO channel 21
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# Grabber (EEM6) starting at RTIO channel 25
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device_db["grabber0"] = {
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"type": "local",
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"module": "artiq.coredevice.grabber",
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"class": "Grabber",
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"arguments": {"channel_base": 21}
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"arguments": {"channel_base": 25}
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}
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# Urukul (EEM7) starting at RTIO channel 23
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# Urukul (EEM7) starting at RTIO channel 27
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device_db.update(
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spi_urukul1={
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 23}
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"arguments": {"channel": 27}
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},
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ttl_urukul1_sync={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLClockGen",
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"arguments": {"channel": 24, "acc_width": 4}
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"arguments": {"channel": 28, "acc_width": 4}
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},
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ttl_urukul1_io_update={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 25}
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"arguments": {"channel": 29}
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},
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urukul1_cpld={
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"type": "local",
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@ -239,44 +245,44 @@ for i in range(4):
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}
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# DIO (EEM8) starting at RTIO channel 26
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# DIO (EEM8) starting at RTIO channel 30
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for i in range(8):
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device_db["ttl" + str(8 + i)] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 26 + i},
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"arguments": {"channel": 30 + i},
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}
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# DIO (EEM9) starting at RTIO channel 34
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# DIO (EEM9) starting at RTIO channel 38
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for i in range(8):
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device_db["ttl" + str(16 + i)] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 34 + i},
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"arguments": {"channel": 38 + i},
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}
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# Sampler (EEM10) starting at RTIO channel 42
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# Sampler (EEM10) starting at RTIO channel 46
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device_db["spi_sampler1_adc"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 42}
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"arguments": {"channel": 46}
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}
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device_db["spi_sampler1_pgia"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 43}
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"arguments": {"channel": 47}
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}
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device_db["spi_sampler1_cnv"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 44},
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"arguments": {"channel": 48},
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}
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device_db["sampler1"] = {
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"type": "local",
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@ -290,24 +296,24 @@ device_db["sampler1"] = {
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}
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# Zotino (EEM11) starting at RTIO channel 45
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# Zotino (EEM11) starting at RTIO channel 49
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device_db["spi_zotino1"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 45}
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"arguments": {"channel": 49}
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}
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device_db["ttl_zotino1_ldac"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 46}
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"arguments": {"channel": 50}
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}
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device_db["ttl_zotino1_clr"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 47}
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"arguments": {"channel": 51}
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}
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device_db["zotino1"] = {
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"type": "local",
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@ -326,13 +332,13 @@ device_db.update(
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 48}
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"arguments": {"channel": 52}
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},
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led1={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 49}
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"arguments": {"channel": 53}
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},
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)
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@ -342,6 +348,7 @@ device_db.update(
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loop_out="ttl4",
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loop_in="ttl0",
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loop_in_counter="ttl0_counter",
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# Urukul CPLD with sync and io_update, IFC MODE 0b1000
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urukul_cpld="urukul0_cpld",
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@ -16,7 +16,7 @@ from misoc.integration.builder import builder_args, builder_argdict
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from artiq.gateware.amp import AMPSoC
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from artiq.gateware import rtio
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from artiq.gateware.rtio.phy import ttl_simple, ttl_serdes_7series
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from artiq.gateware.rtio.phy import ttl_simple, ttl_serdes_7series, edge_counter
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from artiq.gateware import eem
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from artiq.gateware.drtio.transceiver import gtp_7series
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from artiq.gateware.drtio.siphaser import SiPhaser7Series
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@ -737,7 +737,8 @@ class Tester(_StandaloneBase):
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self.rtio_channels = []
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self.grabber_csr_group = []
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eem.DIO.add_std(self, 5,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X,
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edge_counter_cls=edge_counter.SimpleEdgeCounter)
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eem.Urukul.add_std(self, 0, 1, ttl_serdes_7series.Output_8X,
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ttl_simple.ClockGen)
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eem.Sampler.add_std(self, 3, 2, ttl_serdes_7series.Output_8X)
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