mirror of https://github.com/m-labs/artiq.git
urukul: support dds_reset and sync options
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@ -1,11 +1,11 @@
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from numpy import int32, int64
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from artiq.language.core import nac3, Kernel, KernelInvariant, kernel, portable
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from artiq.language.core import *
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from artiq.language.units import us, ms
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from artiq.coredevice.core import Core
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from artiq.coredevice.spi2 import *
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from artiq.coredevice.ttl import TTLOut
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from artiq.coredevice.ttl import TTLOut, TTLClockGen
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SPI_CONFIG = (0 * SPI_OFFLINE | 0 * SPI_END |
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@ -104,15 +104,6 @@ def urukul_sta_proto_rev(sta: int32) -> int32:
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"""Return the PROTO_REV value from Urukul status register value."""
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return (sta >> STA_PROTO_REV) & 0x7f
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@nac3
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class _DummySync:
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def __init__(self, cpld):
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self.cpld = cpld
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@kernel
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def set_mu(self, ftw: int32):
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pass
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@nac3
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class CPLD:
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@ -159,7 +150,8 @@ class CPLD:
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bus: KernelInvariant[SPIMaster]
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io_update: KernelInvariant[TTLOut]
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clk_div: KernelInvariant[int32]
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sync: KernelInvariant[_DummySync]
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dds_reset: KernelInvariant[Option[TTLOut]]
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sync: KernelInvariant[Option[TTLClockGen]]
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cfg_reg: Kernel[int32]
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att_reg: Kernel[int32]
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sync_div: Kernel[int32]
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@ -183,15 +175,15 @@ class CPLD:
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# NAC3TODO
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raise NotImplementedError
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if dds_reset_device is not None:
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self.dds_reset = dmgr.get(dds_reset_device)
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self.dds_reset = Some(dmgr.get(dds_reset_device))
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else:
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self.dds_reset = none
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if sync_device is not None:
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self.sync = dmgr.get(sync_device)
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self.sync = Some(dmgr.get(sync_device))
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if sync_div is None:
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sync_div = 2
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# NAC3TODO
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raise NotImplementedError
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else:
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self.sync = _DummySync(self)
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self.sync = none
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assert sync_div is None
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sync_div = 0
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@ -420,7 +412,8 @@ class CPLD:
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ftw_max = 1 << 4
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ftw = ftw_max // div
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# NAC3TODO assert ftw * div == ftw_max
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self.sync.set_mu(ftw)
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if self.sync.is_some():
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self.sync.unwrap().set_mu(ftw)
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@kernel
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def set_profile(self, profile: int32):
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