diff --git a/artiq/gateware/rtio/analyzer.py b/artiq/gateware/rtio/analyzer.py
index b1e0f6b57..9c38d09ce 100644
--- a/artiq/gateware/rtio/analyzer.py
+++ b/artiq/gateware/rtio/analyzer.py
@@ -214,7 +214,7 @@ class Analyzer(Module, AutoCSR):
 
         self.submodules.message_encoder = MessageEncoder(rtio_core)
         self.submodules.converter = stream.Converter(
-            [("data", 256)], [("data", dw)])
+            [("data", 256)], [("data", dw)], reverse=True)
         self.submodules.fifo = stream.SyncFIFO(
             [("data", dw)], fifo_depth, True)
         self.submodules.dma = DMAWriter(membus)