mirror of https://github.com/m-labs/artiq.git
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from numpy import int32, int64
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from artiq.language.core import kernel, delay, portable
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from artiq.language.units import us, ns
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from artiq.coredevice.ad9912_reg import *
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from artiq.coredevice import spi2 as spi
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from artiq.coredevice import urukul
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SPI_CONFIG = (0*spi.SPI_OFFLINE | 0*spi.SPI_END |
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0*spi.SPI_INPUT | 0*spi.SPI_CS_POLARITY |
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0*spi.SPI_CLK_POLARITY | 0*spi.SPI_CLK_PHASE |
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0*spi.SPI_LSB_FIRST | 0*spi.SPI_HALF_DUPLEX)
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SPI_CS_ADC = 1
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SPI_CS_SR = 2
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@portable
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def adc_ctrl(channel=1, softspan=0b111, valid=1):
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"""Build a LTC2335-16 control word"""
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return (valid << 7) | (channel << 3) | softspan
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@portable
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def adc_softspan(data):
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"""Return the softspan configuration index from a result packet"""
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return data & 0x7
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@portable
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def adc_channel(data):
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"""Return the channel index from a result packet"""
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return (data >> 3) & 0x7
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@portable
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def adc_data(data):
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"""Return the ADC value from a result packet"""
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return (data >> 8) & 0xffff
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@portable
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def adc_value(data, v_ref=5.):
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"""Convert a ADC result packet to SI units (Volt)"""
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softspan = adc_softspan(data)
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data = adc_data(data)
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if softspan & 4:
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g3 = 2
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else:
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g3 = 1
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if softspan & 2:
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g2 = 1 << 15
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else:
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g2 = 1 << 16
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if softspan & 1:
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g1 = 1000
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else:
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g1 = 1023
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data = -(data & g2) + (data & ~g2)
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v_per_lsb = v_ref*(1250*g3)/(g1*g2)
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return data*v_per_lsb
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class Novogorny:
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"""Novogorny ADC.
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Controls the LTC2335-16 8 channel ADC with SPI interface and
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the switchable gain instrumentation amplifiers using a shift
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register.
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:param spi_device: SPI bus device name
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:param conv_device: CONV RTIO TTLOut channel name
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:param div: SPI clock divider (default: 8)
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:param core_device: Core device name
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"""
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kernel_invariants = {"bus", "core", "conv", "div", "v_ref"}
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def __init__(self, dmgr, spi_device, conv_device, div=8,
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core_device="core"):
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self.bus = dmgr.get(spi_device)
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self.core = dmgr.get(core_device)
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self.conv = dmgr.get(conv_device)
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self.div = div
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self.gains = 0x0000
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self.v_ref = 5. # 5 Volt reference
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@kernel
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def set_gain_mu(self, channel, gain):
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"""Set instrumentation amplifier gain of a channel.
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The four gain settings (0, 1, 2, 3) corresponds to gains of
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(1, 10, 100, 1000) respectively.
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:param channel: Channel index
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:param gain: Gain setting
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"""
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self.gains &= ~(0b11 << (channel*2))
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self.gains |= gain << (channel*2)
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self.bus.set_config_mu(SPI_CONFIG | spi.SPI_END,
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2, self.div, SPI_CS_SR)
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self.bus.write(self.gains << 16)
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@kernel
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def configure(self, data):
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"""Set up the ADC sequencer.
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:param data: List of 8 bit control words to write into the sequencer
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table.
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"""
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if len(data) > 1:
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self.bus.set_config_mu(SPI_CONFIG,
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8, self.div, SPI_CS_ADC)
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for i in range(len(data) - 1):
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self.bus.write(data[i] << 24)
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self.bus.set_config_mu(SPI_CONFIG | spi.SPI_END,
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8, self.div, SPI_CS_ADC)
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self.bus.write(data[len(data) - 1] << 24)
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@kernel
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def sample_mu(self, next_ctrl=0):
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"""Acquire a sample:
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Perform a conversion and transfer the sample.
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:param next_ctrl: ADC control word for the next sample
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:return: The ADC result packet (machine units)
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"""
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self.conv.pulse(40*ns) # t_CNVH
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delay(560*ns) # t_CONV max
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self.bus.set_config_mu(SPI_CONFIG | spi.SPI_INPUT | spi.SPI_END,
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24, self.div, SPI_CS_ADC)
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self.bus.write(next_ctrl << 24)
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return self.bus.read()
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@kernel
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def sample(self, next_ctrl=0):
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"""Acquire a sample
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.. seealso:: :meth:`sample_mu`
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:param next_ctrl: ADC control word for the next sample
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:return: The ADC result packet (Volt)
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"""
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return adc_value(self.sample_mu(), self.v_ref)
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@kernel
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def burst_mu(self, data, dt_mu, ctrl=0):
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"""Acquire a burst of samples.
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If the burst is too long and the sample rate too high, there will be
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RTIO input overflows.
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High sample rates lead to gain errors since the impedance between the
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instrumentation amplifier and the ADC is high.
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:param data: List of data values to write result packets into.
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In machine units.
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:param dt: Sample interval in machine units.
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:param ctrl: ADC control word to write during each result packet
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transfer.
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"""
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self.bus.set_config_mu(SPI_CONFIG | spi.SPI_INPUT | spi.SPI_END,
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24, self.div, SPI_CS_ADC)
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for i in range(len(data)):
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t0 = now_mu()
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self.conv.pulse(40*ns) # t_CNVH
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delay(560*ns) # t_CONV max
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self.bus.write(ctrl << 24)
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at_mu(t0 + dt_mu)
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for i in range(len(data)):
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data[i] = self.bus.read()
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@ -16,7 +16,7 @@ __all__ = [
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"SPI_OFFLINE", "SPI_END", "SPI_INPUT",
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"SPI_OFFLINE", "SPI_END", "SPI_INPUT",
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"SPI_CS_POLARITY", "SPI_CLK_POLARITY", "SPI_CLK_PHASE",
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"SPI_CS_POLARITY", "SPI_CLK_POLARITY", "SPI_CLK_PHASE",
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"SPI_LSB_FIRST", "SPI_HALF_DUPLEX",
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"SPI_LSB_FIRST", "SPI_HALF_DUPLEX",
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"SPIMaster", "NRTSPIMaster"
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"SPIMaster"
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]
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]
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SPI_DATA_ADDR = 0
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SPI_DATA_ADDR = 0
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@ -269,7 +269,7 @@ class Opticlock(_StandaloneBase):
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phy = spi2.SPIMaster(self.platform.request("eem3_spi_p"),
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phy = spi2.SPIMaster(self.platform.request("eem3_spi_p"),
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self.platform.request("eem3_spi_n"))
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self.platform.request("eem3_spi_n"))
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self.submodules += phy
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self.submodules += phy
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rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=16))
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for signal in "conv".split():
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for signal in "conv".split():
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pads = platform.request("eem3_{}".format(signal))
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pads = platform.request("eem3_{}".format(signal))
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@ -75,6 +75,12 @@ These drivers are for the core device and the peripherals closely integrated int
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.. automodule:: artiq.coredevice.sawg
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.. automodule:: artiq.coredevice.sawg
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:members:
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:members:
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:mod:`artiq.coredevice.novogorny` module
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----------------------------------------
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.. automodule:: artiq.coredevice.novogorny
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:members:
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:mod:`artiq.coredevice.urukul` module
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:mod:`artiq.coredevice.urukul` module
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-------------------------------------
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-------------------------------------
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