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Update waveform test. Adjust doc-string in driver.
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128b4be8ec
@ -437,18 +437,20 @@ class AD9910:
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This method does not pulse ``IO_UPDATE``.
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:param asf_profile_enable: Enable amplitude scale from single tone profiles.
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:param drg_destination: Digital ramp destination.
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:param drg_destination: Digital ramp destination. Determines the parameter to modulate:
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* 0: Frequency
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* 1: Phase
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* 2: Amplitude
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:param drg_enable: Digital ramp enable.
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:param drg_nodwell_high: Digital ramp no-dwell high.
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:param drg_nodwell_low: Digital ramp no-dwell low.
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:param effective_ftw: Read effective FTW.
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:param sync_validation_disable: Disable the SYNC_SMP_ERR pin indicating
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(active high) detection of a synchronization pulse sampling error.
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:param matched_latency_enable: Simultaneous application of amplitude,
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phase, and frequency changes to the DDS arrive at the output
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* matched_latency_enable = 0: in the order listed
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* matched_latency_enable = 1: simultaneously.
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:param matched_latency_enable: Control the application timing of amplitude,
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phase, and frequency changes at the DDS output:
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* 0: Changes are applied in the order listed.
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* 1: Changes are applied simultaneously.
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"""
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self.write32(_AD9910_REG_CFR2,
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(asf_profile_enable << 24) |
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@ -11,39 +11,56 @@ from artiq.coredevice.urukul import STA_PROTO_REV_8, STA_PROTO_REV_9
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from artiq.experiment import *
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from artiq.test.hardware_testbench import ExperimentCase
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###############################################################################
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###################################################################################
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## NOTE: These test are intended to create waveforms from AD9910 Urukul boards
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## (all protocol revisions, see tests below) used with an oscilloscope.
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## (all protocol revisions, see tests below) used with a dual-channel oscilloscope.
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##
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## Set your oscilloscope to:
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##
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## Time division: 2 ns
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## Voltage division: 500 mV
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##
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## These settings work with a nominal 100 MHz waveform.
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## The settings below work with a nominal 100 MHz waveform. Set trigger to DDS1.
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## You will need to play with your trigger level setting for some of the tests.
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##
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## If you change FREQ (see below) to something else, adjust your oscilloscope
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## settings to accomodate.
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###############################################################################
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###################################################################################
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FREQ = 100 * MHz
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AMP = 1.0
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ATT = 1.0
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# Set to desired devices
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CPLD = "urukul0_cpld"
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DDS1 = "urukul0_ch0"
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DDS2 = "urukul0_ch3"
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CPLD = "urukul1_cpld"
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DDS1 = "urukul1_ch0"
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DDS2 = "urukul1_ch3"
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class AD9910WaveformExp(EnvExperiment):
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def build(self, runner, io_update_device=True):
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def build(
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self,
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runner,
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io_update_device=True,
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multiple_profiles=True,
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osk_manual=True,
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drg_destination=0x0,
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use_dds2=False,
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with_hold=False,
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nodwell=0,
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):
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self.setattr_device("core")
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self.cpld = self.get_device(CPLD)
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self.dds1 = self.get_device(DDS1)
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self.dds2 = self.get_device(DDS2)
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self.runner = runner
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self.io_update_device = io_update_device
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self.multiple_profiles = multiple_profiles
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self.osk_manual = osk_manual
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self.drg_destination = drg_destination
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self.use_dds2 = use_dds2
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self.with_hold = with_hold
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self.nodwell = nodwell
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def run(self):
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getattr(self, self.runner)()
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@ -106,81 +123,6 @@ class AD9910WaveformExp(EnvExperiment):
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self.core.wait_until_mu(now_mu())
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@kernel
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def toggle_profile(self):
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self.core.reset()
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self.cpld.init()
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if not self.io_update_device:
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# Set MASK_NU to trigger CFG.IO_UPDATE
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self.dds1.cfg_mask_nu(True)
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self.dds2.cfg_mask_nu(True)
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self.dds1.init()
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self.dds2.init()
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delay(10 * ms)
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## SET SINGLE-TONE PROFILES
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# Set Profile 7 (default)
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self.dds1.set(FREQ, amplitude=AMP)
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self.dds2.set(FREQ, amplitude=AMP)
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# Set Profile 6 (default)
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self.dds1.set(FREQ + 25 * MHz, amplitude=AMP, profile=6)
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self.dds2.set(FREQ + 25 * MHz, amplitude=AMP, profile=6)
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# Set Profile 5 (default)
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self.dds1.set(FREQ + 50 * MHz, amplitude=AMP, profile=5)
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self.dds2.set(FREQ + 50 * MHz, amplitude=AMP, profile=5)
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# Set Profile 4 (default)
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self.dds1.set(FREQ + 75 * MHz, amplitude=AMP, profile=4)
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self.dds2.set(FREQ + 75 * MHz, amplitude=AMP, profile=4)
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delay(1 * s) # slack
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# Set Profile 3 (default)
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self.dds1.set(FREQ + FREQ, amplitude=AMP, profile=3)
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self.dds2.set(FREQ + FREQ, amplitude=AMP, profile=3)
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# Set Profile 2 (default)
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self.dds1.set(FREQ + 125 * MHz, amplitude=AMP, profile=2)
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self.dds2.set(FREQ + 125 * MHz, amplitude=AMP, profile=2)
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# Set Profile 1 (default)
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self.dds1.set(FREQ + 150 * MHz, amplitude=AMP, profile=1)
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self.dds2.set(FREQ + 150 * MHz, amplitude=AMP, profile=1)
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# Set Profile 0 (default)
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self.dds1.set(FREQ + 175 * MHz, amplitude=AMP, profile=0)
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self.dds2.set(FREQ + 175 * MHz, amplitude=AMP, profile=0)
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# Switch on waveforms -- Profile 7 (default)
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self.dds1.cfg_sw(True)
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self.dds2.cfg_sw(True)
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self.dds1.set_att(ATT)
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self.dds2.set_att(ATT)
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delay(2 * s)
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# Switch off waveforms
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self.dds1.cfg_sw(False)
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self.dds2.cfg_sw(False)
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# Iterate over Profiles 6 to 0
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for i in range(6, -1, -1):
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# Switch channels 0 and 3 to Profile i
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self.cpld.set_profile(0, i)
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# This is the main different between proto_rev's,
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# one sets them all
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# self.cpld.set_profile(3, i)
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self.dds1.cfg_sw(True)
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self.dds2.cfg_sw(True)
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delay(2 * s)
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# Switch off waveforms
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self.dds1.cfg_sw(False)
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self.dds2.cfg_sw(False)
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if not self.io_update_device:
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# Unset MASK_NU to un-trigger CFG.IO_UPDATE
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self.dds1.cfg_mask_nu(False)
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self.dds2.cfg_mask_nu(False)
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self.core.wait_until_mu(now_mu())
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@kernel
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def toggle_profiles(self):
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self.core.reset()
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@ -199,33 +141,23 @@ class AD9910WaveformExp(EnvExperiment):
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delay(10 * ms)
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## SET SINGLE-TONE PROFILES
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# Set Profile 7 (default)
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self.dds1.set(FREQ, amplitude=AMP)
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self.dds2.set(FREQ, amplitude=AMP)
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# Set Profile 6 (default)
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self.dds1.set(FREQ + 25 * MHz, amplitude=AMP, profile=6)
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self.dds2.set(FREQ + 25 * MHz, amplitude=AMP, profile=6)
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# Set Profile 5 (default)
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self.dds1.set(FREQ + 50 * MHz, amplitude=AMP, profile=5)
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self.dds2.set(FREQ + 50 * MHz, amplitude=AMP, profile=5)
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# Set Profile 4 (default)
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self.dds1.set(FREQ + 75 * MHz, amplitude=AMP, profile=4)
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self.dds2.set(FREQ + 75 * MHz, amplitude=AMP, profile=4)
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delay(1 * s) # slack
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# Set Profile 3 (default)
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self.dds1.set(FREQ + FREQ, amplitude=AMP, profile=3)
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self.dds2.set(FREQ + FREQ, amplitude=AMP, profile=3)
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# Set Profile 2 (default)
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self.dds1.set(FREQ + 125 * MHz, amplitude=AMP, profile=2)
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self.dds2.set(FREQ + 125 * MHz, amplitude=AMP, profile=2)
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# Set Profile 1 (default)
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self.dds1.set(FREQ + 150 * MHz, amplitude=AMP, profile=1)
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self.dds2.set(FREQ + 150 * MHz, amplitude=AMP, profile=1)
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# Set Profile 0 (default)
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self.dds1.set(FREQ + 175 * MHz, amplitude=AMP, profile=0)
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self.dds2.set(FREQ + 175 * MHz, amplitude=AMP, profile=0)
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# Set profiles from 7 to 0
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frequencies = [
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0.0,
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25 * MHz,
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50 * MHz,
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75 * MHz,
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100 * MHz,
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125 * MHz,
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150 * MHz,
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175 * MHz,
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]
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for i in range(6, -1, -1):
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freq_offset = frequencies[i]
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profile = 7 - i
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self.dds1.set(FREQ + freq_offset, amplitude=AMP, profile=profile)
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self.dds2.set(FREQ + freq_offset, amplitude=AMP, profile=profile)
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delay(0.5 * s) # slack
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# Switch on waveforms -- Profile 7 (default)
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self.dds1.cfg_sw(True)
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@ -239,9 +171,11 @@ class AD9910WaveformExp(EnvExperiment):
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# Iterate over Profiles 6 to 0
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for i in range(6, -1, -1):
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# Switch channels 0 and 3 to Profile i
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# Switch channels to Profile i
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self.cpld.set_profile(0, i)
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if self.multiple_profiles:
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self.cpld.set_profile(3, i)
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self.dds1.cfg_sw(True)
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self.dds2.cfg_sw(True)
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delay(2 * s)
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@ -275,9 +209,13 @@ class AD9910WaveformExp(EnvExperiment):
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delay(10 * ms)
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self.dds1.set(FREQ, amplitude=AMP)
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if self.osk_manual:
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self.dds1.set_cfr1(manual_osk_external=1, osk_enable=1)
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self.dds1.cpld.io_update.pulse(1 * ms)
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self.dds1.set_asf(0x3FFF)
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else:
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self.dds1.write32(_AD9910_REG_ASF, 0xFFFF << 16 | 0x3FFF << 2 | 0b11)
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self.dds1.set_cfr1(osk_enable=1, select_auto_osk=1)
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self.dds1.cpld.io_update.pulse(1 * ms)
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# Switch on waveform, then set attenuation
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@ -302,197 +240,109 @@ class AD9910WaveformExp(EnvExperiment):
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self.core.wait_until_mu(now_mu())
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@kernel
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def osk_auto(self):
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def drg(self):
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self.core.reset()
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self.cpld.init()
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# Set ATT_EN
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self.dds1.cfg_att_en(True)
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if self.use_dds2:
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self.dds2.cfg_att_en(True)
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if not self.io_update_device:
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# Set MASK_NU to trigger CFG.IO_UPDATE
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self.dds1.cfg_mask_nu(True)
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if self.use_dds2:
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self.dds2.cfg_mask_nu(True)
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self.dds1.init()
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if self.use_dds2:
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self.dds2.init()
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delay(10 * ms)
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# Set initial frequency and amplitude
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self.dds1.set(FREQ, amplitude=AMP)
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self.dds1.set_cfr1(osk_enable=1, select_auto_osk=1)
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self.dds1.cpld.io_update.pulse(1 * ms)
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self.dds1.write32(_AD9910_REG_ASF, 0xFFFF << 16 | 0x3FFF << 2 | 0b11)
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if self.use_dds2:
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self.dds2.set(FREQ, amplitude=AMP)
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# Configure DRG
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if self.drg_destination == 0x0: # Frequency
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ramp_limit_high = self.dds1.frequency_to_ftw(FREQ + 30 * MHz)
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ramp_limit_low = self.dds1.frequency_to_ftw(FREQ - 30 * MHz)
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ramp_rate = 0x004F004F
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ramp_step = 0xF0
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pulse_duration = 1 * s if not self.with_hold else 0.25 * s
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elif self.drg_destination == 0x1: # Phase
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ramp_limit_high = 0xFFFFFFFF
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ramp_limit_low = 0
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ramp_rate = 0xC350C350
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ramp_step = 0xD1B71
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pulse_duration = 2 * s if not self.with_hold else 0.25 * s
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else: # Amplitude
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ramp_limit_high = 0xFFFFFFFF
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ramp_limit_low = 0
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ramp_rate = 0xC350C350
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ramp_step = 0xD1B71
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pulse_duration = 2 * s if not self.with_hold else 0.4 * s
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self.dds1.write64(_AD9910_REG_RAMP_LIMIT, ramp_limit_high, ramp_limit_low)
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self.dds1.write32(_AD9910_REG_RAMP_RATE, ramp_rate)
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self.dds1.write64(_AD9910_REG_RAMP_STEP, ramp_step, ramp_step)
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self.dds1.set_cfr2(
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drg_enable=1,
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drg_destination=self.drg_destination,
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drg_nodwell_high=self.nodwell,
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drg_nodwell_low=self.nodwell,
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)
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self.dds1.cpld.io_update.pulse(1 * ms)
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# Switch on waveform, then set attenuation
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# Enable waveform and set attenuation
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self.dds1.cfg_sw(True)
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self.dds1.set_att(ATT)
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if self.use_dds2:
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self.dds2.cfg_sw(True)
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self.dds2.set_att(ATT)
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if not self.nodwell:
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for _ in range(5):
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self.dds1.cfg_osk(True)
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delay(1 * s)
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self.dds1.cfg_osk(False)
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delay(1 * s)
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# Switch off waveform
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self.dds1.cfg_sw(False)
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if not self.io_update_device:
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# Unset MASK_NU to un-trigger CFG.IO_UPDATE
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self.dds1.cfg_mask_nu(False)
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# UnSet ATT_EN
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self.dds1.cfg_att_en(False)
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self.core.wait_until_mu(now_mu())
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@kernel
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def drg_normal(self):
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self.core.reset()
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self.cpld.init()
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# Set ATT_EN
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self.dds1.cfg_att_en(True)
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if not self.io_update_device:
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# Set MASK_NU to trigger CFG.IO_UPDATE
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self.dds1.cfg_mask_nu(True)
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self.dds1.init()
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delay(10 * ms)
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self.dds1.frequency_to_ftw(FREQ)
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# cfr2 21:20 destination, 19 drg enable, no-dwell high, no-dwell low,
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self.dds1.set(FREQ, amplitude=AMP)
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self.dds1.set_cfr2(drg_enable=1)
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self.dds1.cpld.io_update.pulse(1 * ms)
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self.dds1.write64(
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_AD9910_REG_RAMP_LIMIT,
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self.dds1.frequency_to_ftw(FREQ + 30 * MHz),
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self.dds1.frequency_to_ftw(FREQ - 30 * MHz),
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)
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# The larger the values, the slower the update happens
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self.dds1.write32(_AD9910_REG_RAMP_RATE, 0x004F004F)
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# The smaller the value it is, the smaller the frequency step
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self.dds1.write64(_AD9910_REG_RAMP_STEP, 0xF0, 0xF0)
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self.dds1.cpld.io_update.pulse(1 * ms)
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# Switch on waveform, then set attenuation
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self.dds1.cfg_sw(True)
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self.dds1.set_att(ATT)
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for _ in range(10):
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if self.with_hold:
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self.dds1.cfg_drctl(True)
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delay(0.5 * s)
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delay(pulse_duration)
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self.dds1.cfg_drhold(True)
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delay(pulse_duration)
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self.dds1.cfg_drhold(False)
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delay(pulse_duration)
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self.dds1.cfg_drctl(False)
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delay(0.5 * s)
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# Switch off waveform
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self.dds1.cfg_sw(False)
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if not self.io_update_device:
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# Unset MASK_NU to un-trigger CFG.IO_UPDATE
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self.dds1.cfg_mask_nu(False)
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# UnSet ATT_EN
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self.dds1.cfg_att_en(False)
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self.core.wait_until_mu(now_mu())
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@kernel
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def drg_normal_with_hold(self):
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self.core.reset()
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self.cpld.init()
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# Set ATT_EN
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self.dds1.cfg_att_en(True)
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if not self.io_update_device:
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# Set MASK_NU to trigger CFG.IO_UPDATE
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self.dds1.cfg_mask_nu(True)
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self.dds1.init()
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delay(10 * ms)
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self.dds1.frequency_to_ftw(FREQ)
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# cfr2 21:20 destination, 19 drg enable, no-dwell high, no-dwell low,
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self.dds1.set(FREQ, amplitude=AMP)
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self.dds1.set_cfr2(drg_enable=1)
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self.dds1.cpld.io_update.pulse(1 * ms)
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self.dds1.write64(
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_AD9910_REG_RAMP_LIMIT,
|
||||
self.dds1.frequency_to_ftw(FREQ + 30 * MHz),
|
||||
self.dds1.frequency_to_ftw(FREQ - 30 * MHz),
|
||||
)
|
||||
# The larger the values, the slower the update happens
|
||||
self.dds1.write32(_AD9910_REG_RAMP_RATE, 0x004F004F)
|
||||
# The smaller the value it is, the smaller the frequency step
|
||||
self.dds1.write64(_AD9910_REG_RAMP_STEP, 0xF0, 0xF0)
|
||||
self.dds1.cpld.io_update.pulse(1 * ms)
|
||||
|
||||
# Switch on waveform, then set attenuation
|
||||
self.dds1.cfg_sw(True)
|
||||
self.dds1.set_att(ATT)
|
||||
for _ in range(10):
|
||||
delay(pulse_duration)
|
||||
self.dds1.cfg_drhold(True)
|
||||
delay(pulse_duration)
|
||||
self.dds1.cfg_drhold(False)
|
||||
delay(pulse_duration)
|
||||
else:
|
||||
self.dds1.cfg_drctl(True)
|
||||
delay(0.25 * s)
|
||||
self.dds1.cfg_drhold(True)
|
||||
delay(0.25)
|
||||
self.dds1.cfg_drhold(False)
|
||||
delay(0.25)
|
||||
delay(pulse_duration)
|
||||
self.dds1.cfg_drctl(False)
|
||||
delay(0.25)
|
||||
self.dds1.cfg_drhold(True)
|
||||
delay(0.25)
|
||||
self.dds1.cfg_drhold(False)
|
||||
delay(0.25)
|
||||
# Switch off waveform
|
||||
self.dds1.cfg_sw(False)
|
||||
|
||||
if not self.io_update_device:
|
||||
# Unset MASK_NU to un-trigger CFG.IO_UPDATE
|
||||
self.dds1.cfg_mask_nu(False)
|
||||
|
||||
# UnSet ATT_EN
|
||||
self.dds1.cfg_att_en(False)
|
||||
|
||||
self.core.wait_until_mu(now_mu())
|
||||
|
||||
@kernel
|
||||
def drg_nodwell(self):
|
||||
self.core.reset()
|
||||
self.cpld.init()
|
||||
# Set ATT_EN
|
||||
self.dds1.cfg_att_en(True)
|
||||
if not self.io_update_device:
|
||||
# Set MASK_NU to trigger CFG.IO_UPDATE
|
||||
self.dds1.cfg_mask_nu(True)
|
||||
|
||||
self.dds1.init()
|
||||
|
||||
delay(10 * ms)
|
||||
|
||||
self.dds1.frequency_to_ftw(FREQ)
|
||||
# cfr2 21:20 destination, 19 drg enable, no-dwell high, no-dwell low,
|
||||
self.dds1.set(FREQ, amplitude=AMP)
|
||||
self.dds1.set_cfr2(drg_enable=1, drg_nodwell_high=1, drg_nodwell_low=1)
|
||||
self.dds1.cpld.io_update.pulse(1 * ms)
|
||||
self.dds1.write64(
|
||||
_AD9910_REG_RAMP_LIMIT,
|
||||
self.dds1.frequency_to_ftw(FREQ + 30 * MHz),
|
||||
self.dds1.frequency_to_ftw(FREQ - 30 * MHz),
|
||||
)
|
||||
# The larger the values, the slower the update happens
|
||||
self.dds1.write32(_AD9910_REG_RAMP_RATE, 0x004F004F)
|
||||
# The smaller the value it is, the smaller the frequency step
|
||||
self.dds1.write64(_AD9910_REG_RAMP_STEP, 0xF0, 0xF0)
|
||||
self.dds1.cpld.io_update.pulse(1 * ms)
|
||||
|
||||
# Switch on waveform, then set attenuation
|
||||
self.dds1.cfg_sw(True)
|
||||
self.dds1.set_att(ATT)
|
||||
|
||||
delay(pulse_duration)
|
||||
else:
|
||||
delay(10 * s)
|
||||
# Switch off waveform
|
||||
|
||||
# Disable waveform
|
||||
self.dds1.cfg_sw(False)
|
||||
if self.use_dds2:
|
||||
self.dds2.cfg_sw(False)
|
||||
|
||||
if not self.io_update_device:
|
||||
# Unset MASK_NU to un-trigger CFG.IO_UPDATE
|
||||
self.dds1.cfg_mask_nu(False)
|
||||
if self.use_dds2:
|
||||
self.dds2.cfg_mask_nu(False)
|
||||
|
||||
# UnSet ATT_EN
|
||||
# Unset ATT_EN
|
||||
self.dds1.cfg_att_en(False)
|
||||
if self.use_dds2:
|
||||
self.dds2.cfg_att_en(False)
|
||||
|
||||
self.core.wait_until_mu(now_mu())
|
||||
|
||||
@ -614,12 +464,17 @@ class AD9910Test(ExperimentCase):
|
||||
self.execute(AD9910WaveformExp, "single_tone", io_update_device=False)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_8)
|
||||
def test_toggle_profile(self):
|
||||
self.execute(AD9910WaveformExp, "toggle_profile")
|
||||
def test_toggle_profiles(self):
|
||||
self.execute(AD9910WaveformExp, "toggle_profiles", multiple_profiles=False)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_8)
|
||||
def test_toggle_profile_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "toggle_profile", io_update_device=False)
|
||||
def test_toggle_profiles_no_io_update_device(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp,
|
||||
"toggle_profiles",
|
||||
io_update_device=False,
|
||||
multiple_profiles=False,
|
||||
)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_toggle_profiles(self):
|
||||
@ -630,44 +485,134 @@ class AD9910Test(ExperimentCase):
|
||||
self.execute(AD9910WaveformExp, "toggle_profiles", io_update_device=False)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_osk(self):
|
||||
def test_osk_manual(self):
|
||||
self.execute(AD9910WaveformExp, "osk")
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_osk_no_io_update_device(self):
|
||||
def test_osk_manual_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "osk", io_update_device=False)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_osk_auto(self):
|
||||
self.execute(AD9910WaveformExp, "osk_auto")
|
||||
self.execute(AD9910WaveformExp, "osk", osk_manual=False)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_osk_auto_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "osk_auto", io_update_device=False)
|
||||
self.execute(AD9910WaveformExp, "osk", io_update_device=False, osk_manual=False)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal(self):
|
||||
self.execute(AD9910WaveformExp, "drg_normal")
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "drg_normal", io_update_device=False)
|
||||
def test_drg_normal_frequency(self):
|
||||
self.execute(AD9910WaveformExp, "drg")
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold(self):
|
||||
self.execute(AD9910WaveformExp, "drg_normal_with_hold")
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "drg_normal_with_hold", io_update_device=False)
|
||||
def test_drg_normal_phase(self):
|
||||
self.execute(AD9910WaveformExp, "drg", drg_destination=0x1, use_dds2=True)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell(self):
|
||||
self.execute(AD9910WaveformExp, "drg_nodwell")
|
||||
def test_drg_normal_amplitude(self):
|
||||
self.execute(AD9910WaveformExp, "drg", drg_destination=0x2)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "drg_nodwell", io_update_device=False)
|
||||
def test_drg_normal_frequency_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "drg", io_update_device=False)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_phase_no_io_update_device(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp,
|
||||
"drg",
|
||||
io_update_device=False,
|
||||
drg_destination=0x1,
|
||||
use_dds2=True,
|
||||
)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_amplitude_no_io_update_device(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp, "drg", io_update_device=False, drg_destination=0x2
|
||||
)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold_frequency(self):
|
||||
self.execute(AD9910WaveformExp, "drg", with_hold=True)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold_phase(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp,
|
||||
"drg",
|
||||
drg_destination=0x1,
|
||||
use_dds2=True,
|
||||
with_hold=True,
|
||||
)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold_amplitude(self):
|
||||
self.execute(AD9910WaveformExp, "drg", drg_destination=0x2, with_hold=True)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold_frequency_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "drg", io_update_device=False, with_hold=True)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold_phase_no_io_update_device(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp,
|
||||
"drg",
|
||||
io_update_device=False,
|
||||
drg_destination=0x1,
|
||||
use_dds2=True,
|
||||
with_hold=True,
|
||||
)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_normal_with_hold_amplitude_no_io_update_device(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp,
|
||||
"drg",
|
||||
io_update_device=False,
|
||||
drg_destination=0x2,
|
||||
with_hold=True,
|
||||
)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell_frequency(self):
|
||||
self.execute(AD9910WaveformExp, "drg", nodwell=1)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell_phase(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp, "drg", drg_destination=0x1, use_dds2=True, nodwell=1
|
||||
)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell_amplitude(self):
|
||||
self.execute(AD9910WaveformExp, "drg", drg_destination=0x2, nodwell=1)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell_frequency_no_io_update_device(self):
|
||||
self.execute(AD9910WaveformExp, "drg", io_update_device=False, nodwell=1)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell_phase_no_io_update_device(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp,
|
||||
"drg",
|
||||
io_update_device=False,
|
||||
drg_destination=0x1,
|
||||
use_dds2=True,
|
||||
nodwell=1,
|
||||
)
|
||||
|
||||
@io_update_device(False, proto_rev=STA_PROTO_REV_9)
|
||||
def test_drg_nodwell_amplitude_no_io_update_device(self):
|
||||
self.execute(
|
||||
AD9910WaveformExp,
|
||||
"drg",
|
||||
io_update_device=False,
|
||||
drg_destination=0x2,
|
||||
nodwell=1,
|
||||
)
|
||||
|
||||
@io_update_device(True, proto_rev=STA_PROTO_REV_9)
|
||||
def test_att_single_tone(self):
|
||||
|
||||
Loading…
Reference in New Issue
Block a user