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nist_clock: rename spi*.ce to spi*.cs_n

This commit is contained in:
Robert Jördens 2016-02-29 22:21:18 +01:00
parent 7ef21f03b9
commit 12252abc8f
1 changed files with 3 additions and 3 deletions
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6
artiq/gateware/nist_clock.py
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@ -53,21 +53,21 @@ fmc_adapter_io = [
("spi", 0, ("spi", 0,
Subsignal("clk", Pins("LPC:LA13_N")), Subsignal("clk", Pins("LPC:LA13_N")),
Subsignal("ce", Pins("LPC:LA14_N")), Subsignal("cs_n", Pins("LPC:LA14_N")),
Subsignal("mosi", Pins("LPC:LA17_CC_P")), Subsignal("mosi", Pins("LPC:LA17_CC_P")),
Subsignal("miso", Pins("LPC:LA17_CC_N")), Subsignal("miso", Pins("LPC:LA17_CC_N")),
IOStandard("LVTTL")), IOStandard("LVTTL")),
("spi", 1, ("spi", 1,
Subsignal("clk", Pins("LPC:LA23_N")), Subsignal("clk", Pins("LPC:LA23_N")),
Subsignal("ce", Pins("LPC:LA23_P")), Subsignal("cs_n", Pins("LPC:LA23_P")),
Subsignal("mosi", Pins("LPC:LA18_CC_N")), Subsignal("mosi", Pins("LPC:LA18_CC_N")),
Subsignal("miso", Pins("LPC:LA18_CC_P")), Subsignal("miso", Pins("LPC:LA18_CC_P")),
IOStandard("LVTTL")), IOStandard("LVTTL")),
("spi", 2, ("spi", 2,
Subsignal("clk", Pins("LPC:LA27_P")), Subsignal("clk", Pins("LPC:LA27_P")),
Subsignal("ce", Pins("LPC:LA26_P")), Subsignal("cs_n", Pins("LPC:LA26_P")),
Subsignal("mosi", Pins("LPC:LA27_N")), Subsignal("mosi", Pins("LPC:LA27_N")),
Subsignal("miso", Pins("LPC:LA26_N")), Subsignal("miso", Pins("LPC:LA26_N")),
IOStandard("LVTTL")), IOStandard("LVTTL")),