diff --git a/artiq/coredevice/ad9910.py b/artiq/coredevice/ad9910.py
index 3a79a064b..631a709f8 100644
--- a/artiq/coredevice/ad9910.py
+++ b/artiq/coredevice/ad9910.py
@@ -523,7 +523,12 @@ class AD9910:
 
         This uses machine units (FTW, POW, ASF). The frequency tuning word
         width is 32, the phase offset word width is 16, and the amplitude
-        scale factor width is 14.
+        scale factor width is 14. When profile is set to -1 for RAM mode, ftw,
+        pow_ and asf parameters may not have an impact depending on the RAM
+        data destination. For example, the value in the FTW register will not
+        impact the waveform generated by frequency RAM mode. Refer to the
+        datasheet regarding the source of amplitude, frequency and phase in any
+        mode of operations.
 
         After the SPI transfer, the shared IO update pin is pulsed to
         activate the data.