diff --git a/artiq/gateware/drtio/transceiver/gtx_7series_init.py b/artiq/gateware/drtio/transceiver/gtx_7series_init.py
index e5b67f125..67ac75c68 100644
--- a/artiq/gateware/drtio/transceiver/gtx_7series_init.py
+++ b/artiq/gateware/drtio/transceiver/gtx_7series_init.py
@@ -59,7 +59,7 @@ class GTXInit(Module):
             MultiReg(self.Xxdlysresetdone, Xxdlysresetdone),
             MultiReg(self.Xxphaligndone, Xxphaligndone),
         ]
-        if mode != "single":
+        if mode != "single" and not rx:
             txphinitdone = Signal()
             self.specials += MultiReg(self.txphinitdone, txphinitdone)