mirror of https://github.com/m-labs/artiq.git
language/db: remove implicit_core
This commit is contained in:
parent
ac697e3248
commit
0f007cb1a7
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@ -15,9 +15,6 @@ class _RuntimeEnvironment(LinkInterface):
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class Comm(AutoDB):
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class DBKeys:
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implicit_core = False
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def get_runtime_env(self):
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return _RuntimeEnvironment(1*ns)
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@ -64,7 +64,6 @@ class Comm(AutoDB):
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class DBKeys:
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serial_dev = Parameter("/dev/ttyUSB1")
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baud_rate = Parameter(115200)
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implicit_core = False
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def build(self):
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self.port = serial.serial_for_url(self.serial_dev, baudrate=115200)
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@ -48,7 +48,6 @@ class Core(AutoDB):
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class DBKeys:
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comm = Device()
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external_clock = Parameter(None)
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implicit_core = False
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def build(self):
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self.runtime_env = self.comm.get_runtime_env()
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@ -25,6 +25,7 @@ class DDS(AutoDB):
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"""
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class DBKeys:
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core = Device()
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dds_sysclk = Parameter(1*GHz)
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reg_channel = Argument()
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rtio_switch = Argument()
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@ -4,6 +4,7 @@ from artiq.language.db import *
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class GPIOOut(AutoDB):
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class DBKeys:
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core = Device()
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channel = Argument()
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@kernel
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@ -13,6 +13,7 @@ class LLRTIOOut(AutoDB):
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"""
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class DBKeys:
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core = Device()
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channel = Argument()
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def build(self):
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@ -53,6 +54,7 @@ class LLRTIOOut(AutoDB):
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class _RTIOBase(AutoDB):
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class DBKeys:
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core = Device()
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channel = Argument()
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def build(self):
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@ -113,6 +113,7 @@ class _Frame:
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class CompoundPDQ2(AutoDB):
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class DBKeys:
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core = Device()
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ids = Argument()
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rtio_trigger = Argument()
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rtio_frame = Argument()
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@ -19,7 +19,6 @@ from artiq.tools import file_import, verbosity_args, init_logger
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class ELFRunner(AutoDB):
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class DBKeys:
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comm = Device()
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implicit_core = False
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def run(self, filename):
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with open(filename, "rb") as f:
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@ -75,20 +75,12 @@ class AutoDB:
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def __init__(self, dbh=None, **kwargs):
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self.dbh = dbh
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dbkeys = self.DBKeys()
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if getattr(dbkeys, "implicit_core", True):
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if hasattr(dbkeys, "core"):
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raise ValueError(
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"Set implicit_core to False when"
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" core is explicitly specified")
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dbkeys.core = Device()
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for k, v in kwargs.items():
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object.__setattr__(self, k, v)
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for k in dir(dbkeys):
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for k in dir(self.DBKeys):
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if k not in self.__dict__:
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ak = getattr(dbkeys, k)
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ak = getattr(self.DBKeys, k)
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if isinstance(ak, Argument):
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if ak.default is NoDefault:
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raise AttributeError(
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@ -1,15 +1,12 @@
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from random import Random
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from artiq.language.core import delay, kernel
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from artiq.language.db import AutoDB, Argument
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from artiq.language.db import *
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from artiq.language import units
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from artiq.sim import time
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class Core(AutoDB):
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class DBKeys:
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implicit_core = False
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_level = 0
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def run(self, k_function, k_args, k_kwargs):
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@ -23,6 +20,7 @@ class Core(AutoDB):
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class Input(AutoDB):
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class DBKeys:
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core = Device()
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name = Argument()
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def build(self):
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@ -44,6 +42,7 @@ class Input(AutoDB):
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class WaveOutput(AutoDB):
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class DBKeys:
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core = Device()
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name = Argument()
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@kernel
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@ -54,6 +53,7 @@ class WaveOutput(AutoDB):
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class VoltageOutput(AutoDB):
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class DBKeys:
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core = Device()
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name = Argument()
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@kernel
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@ -30,6 +30,7 @@ def _run_on_host(k_class, **parameters):
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class _Primes(AutoDB):
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class DBKeys:
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core = Device()
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output_list = Argument()
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maximum = Argument()
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@ -85,6 +86,7 @@ class _Misc(AutoDB):
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class _PulseLogger(AutoDB):
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class DBKeys:
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core = Device()
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output_list = Argument()
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name = Argument()
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@ -108,6 +110,7 @@ class _PulseLogger(AutoDB):
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class _Pulses(AutoDB):
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class DBKeys:
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core = Device()
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output_list = Argument()
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def build(self):
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@ -135,6 +138,7 @@ class _MyException(Exception):
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class _Exceptions(AutoDB):
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class DBKeys:
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core = Device()
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trace = Argument()
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@kernel
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@ -258,6 +262,7 @@ class ExecutionCase(unittest.TestCase):
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class _RTIOLoopback(AutoDB):
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class DBKeys:
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core = Device()
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i = Device()
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o = Device()
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npulses = Argument()
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@ -278,6 +283,7 @@ class _RTIOLoopback(AutoDB):
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class _RTIOUnderflow(AutoDB):
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class DBKeys:
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core = Device()
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o = Device()
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@kernel
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@ -289,6 +295,7 @@ class _RTIOUnderflow(AutoDB):
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class _RTIOSequenceError(AutoDB):
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class DBKeys:
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core = Device()
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o = Device()
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@kernel
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@ -6,6 +6,7 @@ class PulseRate(AutoDB):
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__artiq_unit__ = "Pulse rate"
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class DBKeys:
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core = Device()
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ttl0 = Device()
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pulse_rate = Result()
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@ -7,6 +7,7 @@ class RPCTiming(AutoDB):
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__artiq_unit__ = "RPC timing"
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class DBKeys:
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core = Device()
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repeats = Argument(100)
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rpc_time_mean = Result()
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rpc_time_stddev = Result()
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@ -9,6 +9,7 @@ class RTIOSkew(AutoDB):
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__artiq_unit__ = "RTIO skew"
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class DBKeys:
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core = Device()
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pmt0 = Device()
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ttl0 = Device()
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rtio_skew = Result()
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@ -13,6 +13,7 @@ As a very first step, we will turn on a LED on the core device. Create a file ``
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__artiq_unit__ = "ARTIQ tutorial"
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class DBKeys:
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core = Device()
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led = Device()
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@kernel
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@ -46,6 +47,7 @@ Modify the code as follows: ::
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__artiq_unit__ = "ARTIQ tutorial"
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class DBKeys:
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core = Device()
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led = Device()
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@kernel
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@ -91,6 +93,7 @@ Create a new file ``rtio.py`` containing the following: ::
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__artiq_unit__ = "ARTIQ tutorial"
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class DBKeys:
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core = Device()
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ttl0 = Device()
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@kernel
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@ -115,6 +118,7 @@ Try reducing the period of the generated waveform until the CPU cannot keep up w
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__artiq_unit__ = "ARTIQ tutorial"
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class DBKeys:
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core = Device()
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led = Device()
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ttl0 = Device()
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@ -5,6 +5,7 @@ class DDSTest(AutoDB):
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__artiq_unit__ = "DDS test"
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class DBKeys:
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core = Device()
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dds0 = Device()
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dds1 = Device()
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dds2 = Device()
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@ -28,8 +28,6 @@ class FloppingF(AutoDB):
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__artiq_gui_file__ = "flopping_f_simulation_gui.py"
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class DBKeys:
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implicit_core = False
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npoints = Argument(100)
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min_freq = Argument(1000)
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max_freq = Argument(2000)
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@ -6,6 +6,9 @@ from artiq import *
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class Mandelbrot(AutoDB):
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__artiq_unit__ = "Mandelbrot set demo"
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class DBKeys:
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core = Device()
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def col(self, i):
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sys.stdout.write(" .,-:;i+hHM$*#@ "[i])
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@ -5,6 +5,7 @@ class PhotonHistogram(AutoDB):
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__artiq_unit__ = "Photon histogram"
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class DBKeys:
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core = Device()
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bd = Device()
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bdd = Device()
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pmt = Device()
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@ -14,6 +14,7 @@ class Transport(AutoDB):
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__artiq_unit__ = "Transport"
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class DBKeys:
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core = Device()
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bd = Device()
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bdd = Device()
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pmt = Device()
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@ -5,6 +5,7 @@ class AluminumSpectroscopy(AutoDB):
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__artiq_unit__ = "Aluminum spectroscopy (simulation)"
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class DBKeys:
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core = Device()
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mains_sync = Device()
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laser_cooling = Device()
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spectroscopy = Device()
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@ -5,6 +5,7 @@ class SimpleSimulation(AutoDB):
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__artiq_unit__ = "Simple simulation"
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class DBKeys:
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core = Device()
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a = Device()
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b = Device()
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c = Device()
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