mirror of https://github.com/m-labs/artiq.git
board_misoc: reuse riscv dir for comm & kernel
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cb247f235f
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0898e101e2
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@ -1,19 +1,16 @@
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extern crate build_misoc;
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extern crate build_misoc;
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extern crate cc;
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extern crate cc;
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use std::env;
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use std::path::Path;
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use std::path::Path;
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fn main() {
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fn main() {
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build_misoc::cfg();
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build_misoc::cfg();
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let triple = env::var("TARGET").unwrap();
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let vectors_path = "riscv32/vectors.S";
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let arch = triple.split("-").next().unwrap();
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let vectors_path = Path::new(arch).join("vectors.S");
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println!("cargo:rerun-if-changed={}", vectors_path.to_str().unwrap());
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println!("cargo:rerun-if-changed={}", vectors_path);
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cc::Build::new()
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cc::Build::new()
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.flag("--target=riscv32-unknown-elf")
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.flag("--target=riscv32-unknown-elf")
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.file(vectors_path)
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.file(Path::new(vectors_path))
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.compile("vectors");
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.compile("vectors");
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}
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}
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@ -8,7 +8,7 @@ extern crate log;
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extern crate smoltcp;
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extern crate smoltcp;
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#[cfg(target_arch = "riscv32")]
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#[cfg(target_arch = "riscv32")]
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#[path = "riscv32ima/mod.rs"]
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#[path = "riscv32/mod.rs"]
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mod arch;
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mod arch;
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#[cfg(target_arch = "riscv32")]
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#[cfg(target_arch = "riscv32")]
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