mirror of https://github.com/m-labs/artiq.git
transforms.interleaver: implement (without inlining).
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025bfbe746
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@ -953,6 +953,9 @@ class Branch(Terminator):
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def target(self):
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def target(self):
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return self.operands[0]
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return self.operands[0]
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def set_target(self, new_target):
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self.operands[0] = new_target
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class BranchIf(Terminator):
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class BranchIf(Terminator):
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"""
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"""
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A conditional branch instruction.
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A conditional branch instruction.
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@ -1213,6 +1216,9 @@ class Delay(Terminator):
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def target(self):
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def target(self):
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return self.operands[0]
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return self.operands[0]
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def set_target(self, new_target):
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self.operands[0] = new_target
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def substs(self):
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def substs(self):
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return zip(self.var_names, self.operands[1:])
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return zip(self.var_names, self.operands[1:])
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@ -3,7 +3,7 @@
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the timestamp would always monotonically nondecrease.
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the timestamp would always monotonically nondecrease.
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"""
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"""
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from .. import ir
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from .. import ir, iodelay
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from ..analyses import domination
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from ..analyses import domination
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class Interleaver:
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class Interleaver:
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@ -15,8 +15,65 @@ class Interleaver:
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self.process_function(func)
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self.process_function(func)
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def process_function(self, func):
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def process_function(self, func):
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domtree = domination.PostDominatorTree(func)
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for insn in func.instructions():
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print(func)
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if isinstance(insn, ir.Delay):
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for block in func.basic_blocks:
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if any(insn.expr.free_vars()):
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idom = domtree.immediate_dominator(block)
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# If a function has free variables in delay expressions,
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print(block.name, "->", idom.name if idom else "<exit>")
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# that means its IO delay depends on arguments.
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# Do not change such functions in any way so that it will
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# be successfully inlined and then removed by DCE.
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return
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postdom_tree = None
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for insn in func.instructions():
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if isinstance(insn, ir.Parallel):
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# Lazily compute dominators.
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if postdom_tree is None:
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postdom_tree = domination.PostDominatorTree(func)
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interleave_until = postdom_tree.immediate_dominator(insn.basic_block)
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assert (interleave_until is not None) # no nonlocal flow in `with parallel`
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target_block = insn.basic_block
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target_time = 0
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source_blocks = insn.basic_block.successors()
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source_times = [0 for _ in source_blocks]
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while len(source_blocks) > 0:
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def iodelay_of_block(block):
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terminator = block.terminator()
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if isinstance(terminator, ir.Delay):
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# We should be able to fold everything without free variables.
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assert iodelay.is_const(terminator.expr)
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return terminator.expr.value
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else:
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return 0
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def time_after_block(pair):
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index, block = pair
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return source_times[index] + iodelay_of_block(block)
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index, source_block = min(enumerate(source_blocks), key=time_after_block)
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source_block_delay = iodelay_of_block(source_block)
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target_terminator = target_block.terminator()
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if isinstance(target_terminator, (ir.Delay, ir.Branch)):
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target_terminator.set_target(source_block)
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elif isinstance(target_terminator, ir.Parallel):
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target_terminator.replace_with(ir.Branch(source_block))
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else:
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assert False
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new_source_block = postdom_tree.immediate_dominator(source_block)
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assert (new_source_block is not None)
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target_block = source_block
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target_time += source_block_delay
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if new_source_block == interleave_until:
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# We're finished with this branch.
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del source_blocks[index]
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del source_times[index]
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else:
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source_blocks[index] = new_source_block
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source_times[index] = target_time
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@ -0,0 +1,22 @@
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# RUN: %python -m artiq.compiler.testbench.jit %s >%t
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# RUN: OutputCheck %s --file-to-check=%t
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def g():
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with parallel:
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with sequential:
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print("A", now_mu())
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delay_mu(3)
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print("B", now_mu())
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with sequential:
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print("C", now_mu())
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delay_mu(2)
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print("D", now_mu())
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delay_mu(2)
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print("E", now_mu())
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# CHECK-L: C 0
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# CHECK-L: A 2
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# CHECK-L: D 5
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# CHECK-L: B 7
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# CHECK-L: E 7
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g()
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