From 00a27b105a4750e7bd7c590d1b54a607a63fccfb Mon Sep 17 00:00:00 2001 From: David Nadlinger Date: Wed, 9 Nov 2022 21:01:24 +0000 Subject: [PATCH] compiler: Extract maximum alignment from target data layout In particular, i64/double are actually supposed to be aligned to their size on RISC-V (at least according to the ELF psABI), though it is unclear to me whether this actually caused any issues. --- artiq/compiler/transforms/llvm_ir_generator.py | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/artiq/compiler/transforms/llvm_ir_generator.py b/artiq/compiler/transforms/llvm_ir_generator.py index cd54c372f..e3a554cf3 100644 --- a/artiq/compiler/transforms/llvm_ir_generator.py +++ b/artiq/compiler/transforms/llvm_ir_generator.py @@ -177,6 +177,15 @@ class LLVMIRGenerator: self.empty_metadata = self.llmodule.add_metadata([]) self.quote_fail_msg = None + # Maximum alignment required according to the target platform ABI. As this is + # not directly exposed by LLVM, just take the maximum across all the "big" + # elementary types we use. (Vector types, should we ever support them, are + # likely contenders for even larger alignment requirements.) + self.max_target_alignment = max(map( + lambda t: self.abi_layout_info.get_size_align(t)[1], + [lli64, lldouble, llptr] + )) + def add_pred(self, pred, block): if block not in self.llpred_map: self.llpred_map[block] = set() @@ -1529,7 +1538,7 @@ class LLVMIRGenerator: self.llbuilder.position_at_end(llalloc) llalloca = self.llbuilder.alloca(lli8, llsize, name="rpc.alloc") - llalloca.align = 4 # maximum alignment required by OR1K ABI + llalloca.align = self.max_target_alignment llphi.add_incoming(llalloca, llalloc) self.llbuilder.branch(llhead)