2014-06-18 19:43:09 +08:00
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from artiq.language.units import *
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2014-07-11 00:13:37 +08:00
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from artiq.language.core import *
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2014-06-18 19:43:09 +08:00
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2014-07-10 21:29:22 +08:00
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class SimpleSimulation(MPO):
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2014-07-11 07:12:40 +08:00
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parameters = "a b c d"
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2014-06-18 19:43:09 +08:00
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@kernel
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def run(self):
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with parallel:
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with sequential:
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self.a.pulse(100*MHz, 20*us)
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self.b.pulse(200*MHz, 20*us)
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with sequential:
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self.c.pulse(300*MHz, 10*us)
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self.d.pulse(400*MHz, 20*us)
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if __name__ == "__main__":
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from artiq.sim import devices as sd
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from artiq.sim import time
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2014-08-13 18:16:40 +08:00
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coredev = sd.Core()
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2014-06-18 19:43:09 +08:00
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exp = SimpleSimulation(
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2014-08-13 18:16:40 +08:00
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core=coredev,
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a=sd.WaveOutput(core=coredev, name="a"),
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b=sd.WaveOutput(core=coredev, name="b"),
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c=sd.WaveOutput(core=coredev, name="c"),
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d=sd.WaveOutput(core=coredev, name="d"),
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2014-06-18 19:43:09 +08:00
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)
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exp.run()
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print(time.manager.format_timeline())
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