72 lines
1.4 KiB
Plaintext
72 lines
1.4 KiB
Plaintext
ENTRY(_boot_cores);
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STACK_SIZE = 0x8000;
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HEAP_SIZE = 0x1000000;
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/* Provide some defaults */
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PROVIDE(Reset = _boot_cores);
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PROVIDE(UndefinedInstruction = Reset);
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PROVIDE(SoftwareInterrupt = Reset);
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PROVIDE(PrefetchAbort = Reset);
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PROVIDE(DataAbort = Reset);
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PROVIDE(ReservedException = Reset);
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PROVIDE(IRQ = Reset);
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PROVIDE(FIQ = Reset);
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MEMORY
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{
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SDRAM : ORIGIN = 0x00100000, LENGTH = 0x1FF00000
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}
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SECTIONS
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{
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.text :
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{
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KEEP(*(.text.exceptions));
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*(.text.boot);
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*(.text .text.*);
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} > SDRAM
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.rodata : ALIGN(4)
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{
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*(.rodata .rodata.*);
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} > SDRAM
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.data : ALIGN(4)
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{
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*(.data .data.*);
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} > SDRAM
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.bss (NOLOAD) : ALIGN(0x4000)
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{
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/* Aligned to 16 kB */
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KEEP(*(.bss.l1_table));
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*(.bss .bss.*);
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. = ALIGN(4);
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} > SDRAM
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__bss_start = ADDR(.bss);
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__bss_end = ADDR(.bss) + SIZEOF(.bss);
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.heap (NOLOAD) : ALIGN(0x1000)
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{
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. += HEAP_SIZE;
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} > SDRAM
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__heap_start = ADDR(.heap);
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__heap_end = ADDR(.heap) + SIZEOF(.heap);
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.stack (NOLOAD) : ALIGN(0x1000)
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{
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. += STACK_SIZE;
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} > SDRAM
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__stack_end = ADDR(.stack);
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__stack_start = ADDR(.stack) + SIZEOF(.stack);
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/DISCARD/ :
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{
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/* Unused exception related info that only wastes space */
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*(.ARM.exidx);
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*(.ARM.exidx.*);
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*(.ARM.extab.*);
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}
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}
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