348 lines
9.4 KiB
Rust
348 lines
9.4 KiB
Rust
use core::sync::atomic::{fence, Ordering};
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use cslice::CSlice;
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use libcortex_a9::asm;
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use vcell::VolatileCell;
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use crate::{artiq_raise, pl::csr, resolve_channel_name, rtio_core};
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pub const RTIO_O_STATUS_WAIT: i32 = 1;
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pub const RTIO_O_STATUS_UNDERFLOW: i32 = 2;
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pub const RTIO_O_STATUS_DESTINATION_UNREACHABLE: i32 = 4;
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pub const RTIO_I_STATUS_WAIT_EVENT: i32 = 1;
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pub const RTIO_I_STATUS_OVERFLOW: i32 = 2;
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#[allow(unused)]
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pub const RTIO_I_STATUS_WAIT_STATUS: i32 = 4; // TODO
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pub const RTIO_I_STATUS_DESTINATION_UNREACHABLE: i32 = 8;
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#[repr(C)]
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pub struct TimestampedData {
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timestamp: i64,
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data: i32,
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}
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#[repr(C, align(64))]
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struct Transaction {
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request_cmd: i8,
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data_width: i8,
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padding0: [i8; 2],
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request_target: i32,
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request_timestamp: i64,
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request_data: [i32; 16],
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padding1: [i64; 2],
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reply_status: VolatileCell<i32>,
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reply_data: VolatileCell<i32>,
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reply_timestamp: VolatileCell<i64>,
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padding2: [i64; 2],
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}
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static mut TRANSACTION_BUFFER: Transaction = Transaction {
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request_cmd: 0,
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data_width: 0,
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request_target: 0,
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request_timestamp: 0,
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request_data: [0; 16],
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reply_status: VolatileCell::new(0),
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reply_data: VolatileCell::new(0),
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reply_timestamp: VolatileCell::new(0),
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padding0: [0; 2],
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padding1: [0; 2],
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padding2: [0; 2],
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};
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pub extern "C" fn init() {
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unsafe {
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rtio_core::reset_write(1);
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csr::rtio::engine_addr_base_write(&TRANSACTION_BUFFER as *const Transaction as u32);
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csr::rtio::enable_write(1);
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}
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}
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pub extern "C" fn get_counter() -> i64 {
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unsafe {
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csr::rtio::counter_update_write(1);
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csr::rtio::counter_read() as i64
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}
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}
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static mut NOW: i64 = 0;
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pub extern "C" fn now_mu() -> i64 {
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unsafe { NOW }
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}
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pub extern "C" fn at_mu(t: i64) {
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unsafe { NOW = t }
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}
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pub extern "C" fn delay_mu(dt: i64) {
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unsafe { NOW += dt }
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}
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#[inline(never)]
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unsafe fn process_exceptional_status(channel: i32, status: i32) {
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let timestamp = now_mu();
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if status & RTIO_O_STATUS_WAIT != 0 {
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// FIXME: this is a kludge and probably buggy (kernel interrupted?)
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while csr::rtio::o_status_read() as i32 & RTIO_O_STATUS_WAIT != 0 {}
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}
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if status & RTIO_O_STATUS_UNDERFLOW != 0 {
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artiq_raise!(
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"RTIOUnderflow",
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format!(
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"RTIO underflow at {{1}} mu, channel 0x{:04x}:{}, slack {{2}} mu",
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channel,
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resolve_channel_name(channel as u32)
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),
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channel as i64,
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timestamp,
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timestamp - get_counter()
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);
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}
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if status & RTIO_O_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!(
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"RTIODestinationUnreachable",
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format!(
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"RTIO destination unreachable, output, at {{0}} mu, channel 0x{:04x}:{}",
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channel,
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resolve_channel_name(channel as u32)
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),
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timestamp,
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channel as i64,
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0
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);
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}
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}
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pub extern "C" fn output(target: i32, data: i32) {
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unsafe {
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// Clear status so we can observe response
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 0;
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TRANSACTION_BUFFER.data_width = 1;
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TRANSACTION_BUFFER.request_target = target;
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TRANSACTION_BUFFER.request_timestamp = NOW;
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TRANSACTION_BUFFER.request_data[0] = data;
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fence(Ordering::SeqCst);
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break;
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}
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}
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let status = status & !0x10000;
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if status != 0 {
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process_exceptional_status(target >> 8, status);
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}
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}
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}
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pub extern "C" fn output_wide(target: i32, data: CSlice<i32>) {
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unsafe {
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// Clear status so we can observe response
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 0;
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TRANSACTION_BUFFER.data_width = data.len() as i8;
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TRANSACTION_BUFFER.request_target = target;
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TRANSACTION_BUFFER.request_timestamp = NOW;
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TRANSACTION_BUFFER.request_data[..data.len()].copy_from_slice(data.as_ref());
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fence(Ordering::SeqCst);
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break;
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}
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}
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let status = status & !0x10000;
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if status != 0 {
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process_exceptional_status(target >> 8, status);
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}
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}
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}
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pub extern "C" fn input_timestamp(timeout: i64, channel: i32) -> i64 {
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unsafe {
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// Clear status so we can observe response
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 1;
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TRANSACTION_BUFFER.request_timestamp = timeout;
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TRANSACTION_BUFFER.request_target = channel << 8;
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TRANSACTION_BUFFER.data_width = 0;
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fence(Ordering::SeqCst);
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break;
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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artiq_raise!(
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"RTIOOverflow",
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format!(
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"RTIO input overflow on channel 0x{:04x}:{}",
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channel,
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resolve_channel_name(channel as u32)
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),
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channel as i64,
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0,
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0
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);
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}
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if status & RTIO_I_STATUS_WAIT_EVENT != 0 {
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return -1;
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}
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if status & RTIO_I_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!(
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"RTIODestinationUnreachable",
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format!(
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"RTIO destination unreachable, input, on channel 0x{:04x}:{}",
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channel,
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resolve_channel_name(channel as u32)
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),
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channel as i64,
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0,
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0
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);
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}
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TRANSACTION_BUFFER.reply_timestamp.get()
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}
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}
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pub extern "C" fn input_data(channel: i32) -> i32 {
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unsafe {
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 1;
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TRANSACTION_BUFFER.request_timestamp = -1;
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TRANSACTION_BUFFER.request_target = channel << 8;
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TRANSACTION_BUFFER.data_width = 0;
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fence(Ordering::SeqCst);
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break;
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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artiq_raise!(
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"RTIOOverflow",
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format!(
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"RTIO input overflow on channel 0x{:04x}:{}",
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channel,
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resolve_channel_name(channel as u32)
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),
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channel as i64,
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0,
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0
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);
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}
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if status & RTIO_I_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!(
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"RTIODestinationUnreachable",
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format!(
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"RTIO destination unreachable, input, on channel 0x{:04x}:{}",
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channel,
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resolve_channel_name(channel as u32)
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),
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channel as i64,
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0,
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0
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);
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}
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TRANSACTION_BUFFER.reply_data.get()
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}
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}
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pub extern "C" fn input_timestamped_data(timeout: i64, channel: i32) -> TimestampedData {
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unsafe {
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 1;
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TRANSACTION_BUFFER.request_timestamp = timeout;
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TRANSACTION_BUFFER.request_target = channel << 8;
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TRANSACTION_BUFFER.data_width = 0;
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fence(Ordering::SeqCst);
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break;
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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artiq_raise!(
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"RTIOOverflow",
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format!(
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"RTIO input overflow on channel 0x{:04x}:{}",
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channel,
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resolve_channel_name(channel as u32)
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),
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channel as i64,
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0,
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0
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);
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}
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if status & RTIO_I_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!(
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"RTIODestinationUnreachable",
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format!(
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"RTIO destination unreachable, input, on channel 0x{:04x}:{}",
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channel,
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resolve_channel_name(channel as u32)
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),
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channel as i64,
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0,
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0
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);
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}
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TimestampedData {
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timestamp: TRANSACTION_BUFFER.reply_timestamp.get(),
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data: TRANSACTION_BUFFER.reply_data.get(),
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}
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}
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}
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pub fn write_log(data: &[i8]) {
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let mut word: u32 = 0;
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for i in 0..data.len() {
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word <<= 8;
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word |= data[i] as u32;
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if i % 4 == 3 {
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output((csr::CONFIG_RTIO_LOG_CHANNEL << 8) as i32, word as i32);
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word = 0;
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}
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}
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if word != 0 {
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output((csr::CONFIG_RTIO_LOG_CHANNEL << 8) as i32, word as i32);
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}
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}
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