You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

ps7_init.tcl 33KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771
  1. proc ps7_pll_init_data_3_0 {} {
  2. mwr -force 0XF8000008 0x0000DF0D
  3. mask_write 0XF8000110 0x003FFFF0 0x000FA220
  4. mask_write 0XF8000100 0x0007F000 0x00028000
  5. mask_write 0XF8000100 0x00000010 0x00000010
  6. mask_write 0XF8000100 0x00000001 0x00000001
  7. mask_write 0XF8000100 0x00000001 0x00000000
  8. mask_poll 0XF800010C 0x00000001
  9. mask_write 0XF8000100 0x00000010 0x00000000
  10. mask_write 0XF8000120 0x1F003F30 0x1F000200
  11. mask_write 0XF8000114 0x003FFFF0 0x0012C220
  12. mask_write 0XF8000104 0x0007F000 0x00020000
  13. mask_write 0XF8000104 0x00000010 0x00000010
  14. mask_write 0XF8000104 0x00000001 0x00000001
  15. mask_write 0XF8000104 0x00000001 0x00000000
  16. mask_poll 0XF800010C 0x00000002
  17. mask_write 0XF8000104 0x00000010 0x00000000
  18. mask_write 0XF8000124 0xFFF00003 0x0C200003
  19. mask_write 0XF8000118 0x003FFFF0 0x001452C0
  20. mask_write 0XF8000108 0x0007F000 0x0001E000
  21. mask_write 0XF8000108 0x00000010 0x00000010
  22. mask_write 0XF8000108 0x00000001 0x00000001
  23. mask_write 0XF8000108 0x00000001 0x00000000
  24. mask_poll 0XF800010C 0x00000004
  25. mask_write 0XF8000108 0x00000010 0x00000000
  26. mwr -force 0XF8000004 0x0000767B
  27. }
  28. proc ps7_clock_init_data_3_0 {} {
  29. mwr -force 0XF8000008 0x0000DF0D
  30. mask_write 0XF8000128 0x03F03F01 0x00700F01
  31. mask_write 0XF8000138 0x00000011 0x00000001
  32. mask_write 0XF8000140 0x03F03F71 0x00100801
  33. mask_write 0XF800014C 0x00003F31 0x00000501
  34. mask_write 0XF8000150 0x00003F33 0x00001401
  35. mask_write 0XF8000154 0x00003F33 0x00001402
  36. mask_write 0XF8000168 0x00003F31 0x00000501
  37. mask_write 0XF8000170 0x03F03F30 0x00200500
  38. mask_write 0XF80001C4 0x00000001 0x00000001
  39. mask_write 0XF800012C 0x01FFCCCD 0x01EC044D
  40. mwr -force 0XF8000004 0x0000767B
  41. }
  42. proc ps7_ddr_init_data_3_0 {} {
  43. mask_write 0XF8006000 0x0001FFFF 0x00000080
  44. mask_write 0XF8006004 0x0007FFFF 0x00001081
  45. mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
  46. mask_write 0XF800600C 0x03FFFFFF 0x02001001
  47. mask_write 0XF8006010 0x03FFFFFF 0x00014001
  48. mask_write 0XF8006014 0x001FFFFF 0x0004159B
  49. mask_write 0XF8006018 0xF7FFFFFF 0x452460D2
  50. mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
  51. mask_write 0XF8006020 0x7FDFFFFC 0x270872D0
  52. mask_write 0XF8006024 0x0FFFFFC3 0x00000000
  53. mask_write 0XF8006028 0x00003FFF 0x00002007
  54. mask_write 0XF800602C 0xFFFFFFFF 0x00000008
  55. mask_write 0XF8006030 0xFFFFFFFF 0x00040930
  56. mask_write 0XF8006034 0x13FF3FFF 0x000116D4
  57. mask_write 0XF8006038 0x00000003 0x00000000
  58. mask_write 0XF800603C 0x000FFFFF 0x00000777
  59. mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000
  60. mask_write 0XF8006044 0x0FFFFFFF 0x0FF66666
  61. mask_write 0XF8006048 0x0003F03F 0x0003C008
  62. mask_write 0XF8006050 0xFF0F8FFF 0x77010800
  63. mask_write 0XF8006058 0x00010000 0x00000000
  64. mask_write 0XF800605C 0x0000FFFF 0x00005003
  65. mask_write 0XF8006060 0x000017FF 0x0000003E
  66. mask_write 0XF8006064 0x00021FE0 0x00020000
  67. mask_write 0XF8006068 0x03FFFFFF 0x00284141
  68. mask_write 0XF800606C 0x0000FFFF 0x00001610
  69. mask_write 0XF8006078 0x03FFFFFF 0x00466111
  70. mask_write 0XF800607C 0x000FFFFF 0x00032222
  71. mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
  72. mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73
  73. mask_write 0XF80060AC 0x000001FF 0x000001FE
  74. mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
  75. mask_write 0XF80060B4 0x00000200 0x00000200
  76. mask_write 0XF80060B8 0x01FFFFFF 0x00200066
  77. mask_write 0XF80060C4 0x00000003 0x00000000
  78. mask_write 0XF80060C8 0x000000FF 0x00000000
  79. mask_write 0XF80060DC 0x00000001 0x00000000
  80. mask_write 0XF80060F0 0x0000FFFF 0x00000000
  81. mask_write 0XF80060F4 0x0000000F 0x00000008
  82. mask_write 0XF8006114 0x000000FF 0x00000000
  83. mask_write 0XF8006118 0x7FFFFFCF 0x40000001
  84. mask_write 0XF800611C 0x7FFFFFCF 0x40000001
  85. mask_write 0XF8006120 0x7FFFFFCF 0x40000001
  86. mask_write 0XF8006124 0x7FFFFFCF 0x40000001
  87. mask_write 0XF800612C 0x000FFFFF 0x00033C03
  88. mask_write 0XF8006130 0x000FFFFF 0x00034003
  89. mask_write 0XF8006134 0x000FFFFF 0x0002F400
  90. mask_write 0XF8006138 0x000FFFFF 0x00030400
  91. mask_write 0XF8006140 0x000FFFFF 0x00000035
  92. mask_write 0XF8006144 0x000FFFFF 0x00000035
  93. mask_write 0XF8006148 0x000FFFFF 0x00000035
  94. mask_write 0XF800614C 0x000FFFFF 0x00000035
  95. mask_write 0XF8006154 0x000FFFFF 0x00000083
  96. mask_write 0XF8006158 0x000FFFFF 0x00000083
  97. mask_write 0XF800615C 0x000FFFFF 0x00000080
  98. mask_write 0XF8006160 0x000FFFFF 0x00000080
  99. mask_write 0XF8006168 0x001FFFFF 0x00000124
  100. mask_write 0XF800616C 0x001FFFFF 0x00000125
  101. mask_write 0XF8006170 0x001FFFFF 0x00000112
  102. mask_write 0XF8006174 0x001FFFFF 0x00000116
  103. mask_write 0XF800617C 0x000FFFFF 0x000000C3
  104. mask_write 0XF8006180 0x000FFFFF 0x000000C3
  105. mask_write 0XF8006184 0x000FFFFF 0x000000C0
  106. mask_write 0XF8006188 0x000FFFFF 0x000000C0
  107. mask_write 0XF8006190 0x6FFFFEFE 0x00040080
  108. mask_write 0XF8006194 0x000FFFFF 0x0001FC82
  109. mask_write 0XF8006204 0xFFFFFFFF 0x00000000
  110. mask_write 0XF8006208 0x000703FF 0x000003FF
  111. mask_write 0XF800620C 0x000703FF 0x000003FF
  112. mask_write 0XF8006210 0x000703FF 0x000003FF
  113. mask_write 0XF8006214 0x000703FF 0x000003FF
  114. mask_write 0XF8006218 0x000F03FF 0x000003FF
  115. mask_write 0XF800621C 0x000F03FF 0x000003FF
  116. mask_write 0XF8006220 0x000F03FF 0x000003FF
  117. mask_write 0XF8006224 0x000F03FF 0x000003FF
  118. mask_write 0XF80062A8 0x00000FF5 0x00000000
  119. mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
  120. mask_write 0XF80062B0 0x003FFFFF 0x00005125
  121. mask_write 0XF80062B4 0x0003FFFF 0x000012A8
  122. mask_poll 0XF8000B74 0x00002000
  123. mask_write 0XF8006000 0x0001FFFF 0x00000081
  124. mask_poll 0XF8006054 0x00000007
  125. }
  126. proc ps7_mio_init_data_3_0 {} {
  127. mwr -force 0XF8000008 0x0000DF0D
  128. mask_write 0XF8000B40 0x00000FFF 0x00000600
  129. mask_write 0XF8000B44 0x00000FFF 0x00000600
  130. mask_write 0XF8000B48 0x00000FFF 0x00000672
  131. mask_write 0XF8000B4C 0x00000FFF 0x00000672
  132. mask_write 0XF8000B50 0x00000FFF 0x00000674
  133. mask_write 0XF8000B54 0x00000FFF 0x00000674
  134. mask_write 0XF8000B58 0x00000FFF 0x00000600
  135. mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C
  136. mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C
  137. mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C
  138. mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C
  139. mask_write 0XF8000B6C 0x00007FFF 0x00000209
  140. mask_write 0XF8000B70 0x00000001 0x00000001
  141. mask_write 0XF8000B70 0x00000021 0x00000020
  142. mask_write 0XF8000B70 0x07FEFFFF 0x00000823
  143. mask_write 0XF8000700 0x00003FFF 0x00000600
  144. mask_write 0XF8000704 0x00003FFF 0x00000702
  145. mask_write 0XF8000708 0x00003FFF 0x00000702
  146. mask_write 0XF800070C 0x00003FFF 0x00000702
  147. mask_write 0XF8000710 0x00003FFF 0x00000702
  148. mask_write 0XF8000714 0x00003FFF 0x00000702
  149. mask_write 0XF8000718 0x00003FFF 0x00000702
  150. mask_write 0XF800071C 0x00003FFF 0x00000600
  151. mask_write 0XF8000720 0x00003FFF 0x00000700
  152. mask_write 0XF8000724 0x00003FFF 0x00000600
  153. mask_write 0XF8000728 0x00003FFF 0x00000600
  154. mask_write 0XF800072C 0x00003FFF 0x00000600
  155. mask_write 0XF8000730 0x00003FFF 0x00000600
  156. mask_write 0XF8000734 0x00003FFF 0x00000600
  157. mask_write 0XF8000738 0x00003FFF 0x00000600
  158. mask_write 0XF800073C 0x00003FFF 0x00000600
  159. mask_write 0XF8000740 0x00003FFF 0x00000302
  160. mask_write 0XF8000744 0x00003FFF 0x00000302
  161. mask_write 0XF8000748 0x00003FFF 0x00000302
  162. mask_write 0XF800074C 0x00003FFF 0x00000302
  163. mask_write 0XF8000750 0x00003FFF 0x00000302
  164. mask_write 0XF8000754 0x00003FFF 0x00000302
  165. mask_write 0XF8000758 0x00003FFF 0x00000303
  166. mask_write 0XF800075C 0x00003FFF 0x00000303
  167. mask_write 0XF8000760 0x00003FFF 0x00000303
  168. mask_write 0XF8000764 0x00003FFF 0x00000303
  169. mask_write 0XF8000768 0x00003FFF 0x00000303
  170. mask_write 0XF800076C 0x00003FFF 0x00000303
  171. mask_write 0XF8000770 0x00003FFF 0x00000304
  172. mask_write 0XF8000774 0x00003FFF 0x00000305
  173. mask_write 0XF8000778 0x00003FFF 0x00000304
  174. mask_write 0XF800077C 0x00003FFF 0x00000305
  175. mask_write 0XF8000780 0x00003FFF 0x00000304
  176. mask_write 0XF8000784 0x00003FFF 0x00000304
  177. mask_write 0XF8000788 0x00003FFF 0x00000304
  178. mask_write 0XF800078C 0x00003FFF 0x00000304
  179. mask_write 0XF8000790 0x00003FFF 0x00000305
  180. mask_write 0XF8000794 0x00003FFF 0x00000304
  181. mask_write 0XF8000798 0x00003FFF 0x00000304
  182. mask_write 0XF800079C 0x00003FFF 0x00000304
  183. mask_write 0XF80007A0 0x00003FFF 0x00000380
  184. mask_write 0XF80007A4 0x00003FFF 0x00000380
  185. mask_write 0XF80007A8 0x00003FFF 0x00000380
  186. mask_write 0XF80007AC 0x00003FFF 0x00000380
  187. mask_write 0XF80007B0 0x00003FFF 0x00000380
  188. mask_write 0XF80007B4 0x00003FFF 0x00000380
  189. mask_write 0XF80007B8 0x00003F01 0x00000201
  190. mask_write 0XF80007BC 0x00003F01 0x00000201
  191. mask_write 0XF80007C0 0x00003FFF 0x000002E0
  192. mask_write 0XF80007C4 0x00003FFF 0x000002E1
  193. mask_write 0XF80007C8 0x00003FFF 0x00000200
  194. mask_write 0XF80007CC 0x00003FFF 0x00000200
  195. mask_write 0XF80007D0 0x00003FFF 0x00000280
  196. mask_write 0XF80007D4 0x00003FFF 0x00000280
  197. mask_write 0XF8000830 0x003F003F 0x002F002E
  198. mwr -force 0XF8000004 0x0000767B
  199. }
  200. proc ps7_peripherals_init_data_3_0 {} {
  201. mwr -force 0XF8000008 0x0000DF0D
  202. mask_write 0XF8000B48 0x00000180 0x00000180
  203. mask_write 0XF8000B4C 0x00000180 0x00000180
  204. mask_write 0XF8000B50 0x00000180 0x00000180
  205. mask_write 0XF8000B54 0x00000180 0x00000180
  206. mwr -force 0XF8000004 0x0000767B
  207. mask_write 0XE0001034 0x000000FF 0x00000006
  208. mask_write 0XE0001018 0x0000FFFF 0x0000003E
  209. mask_write 0XE0001000 0x000001FF 0x00000017
  210. mask_write 0XE0001004 0x000003FF 0x00000020
  211. mask_write 0XE000D000 0x00080000 0x00080000
  212. mask_write 0XF8007000 0x20000000 0x00000000
  213. }
  214. proc ps7_post_config_3_0 {} {
  215. mwr -force 0XF8000008 0x0000DF0D
  216. mask_write 0XF8000900 0x0000000F 0x0000000F
  217. mask_write 0XF8000240 0xFFFFFFFF 0x00000000
  218. mwr -force 0XF8000004 0x0000767B
  219. }
  220. proc ps7_debug_3_0 {} {
  221. mwr -force 0XF8898FB0 0xC5ACCE55
  222. mwr -force 0XF8899FB0 0xC5ACCE55
  223. mwr -force 0XF8809FB0 0xC5ACCE55
  224. }
  225. proc ps7_pll_init_data_2_0 {} {
  226. mwr -force 0XF8000008 0x0000DF0D
  227. mask_write 0XF8000110 0x003FFFF0 0x000FA220
  228. mask_write 0XF8000100 0x0007F000 0x00028000
  229. mask_write 0XF8000100 0x00000010 0x00000010
  230. mask_write 0XF8000100 0x00000001 0x00000001
  231. mask_write 0XF8000100 0x00000001 0x00000000
  232. mask_poll 0XF800010C 0x00000001
  233. mask_write 0XF8000100 0x00000010 0x00000000
  234. mask_write 0XF8000120 0x1F003F30 0x1F000200
  235. mask_write 0XF8000114 0x003FFFF0 0x0012C220
  236. mask_write 0XF8000104 0x0007F000 0x00020000
  237. mask_write 0XF8000104 0x00000010 0x00000010
  238. mask_write 0XF8000104 0x00000001 0x00000001
  239. mask_write 0XF8000104 0x00000001 0x00000000
  240. mask_poll 0XF800010C 0x00000002
  241. mask_write 0XF8000104 0x00000010 0x00000000
  242. mask_write 0XF8000124 0xFFF00003 0x0C200003
  243. mask_write 0XF8000118 0x003FFFF0 0x001452C0
  244. mask_write 0XF8000108 0x0007F000 0x0001E000
  245. mask_write 0XF8000108 0x00000010 0x00000010
  246. mask_write 0XF8000108 0x00000001 0x00000001
  247. mask_write 0XF8000108 0x00000001 0x00000000
  248. mask_poll 0XF800010C 0x00000004
  249. mask_write 0XF8000108 0x00000010 0x00000000
  250. mwr -force 0XF8000004 0x0000767B
  251. }
  252. proc ps7_clock_init_data_2_0 {} {
  253. mwr -force 0XF8000008 0x0000DF0D
  254. mask_write 0XF8000128 0x03F03F01 0x00700F01
  255. mask_write 0XF8000138 0x00000011 0x00000001
  256. mask_write 0XF8000140 0x03F03F71 0x00100801
  257. mask_write 0XF800014C 0x00003F31 0x00000501
  258. mask_write 0XF8000150 0x00003F33 0x00001401
  259. mask_write 0XF8000154 0x00003F33 0x00001402
  260. mask_write 0XF8000168 0x00003F31 0x00000501
  261. mask_write 0XF8000170 0x03F03F30 0x00200500
  262. mask_write 0XF80001C4 0x00000001 0x00000001
  263. mask_write 0XF800012C 0x01FFCCCD 0x01EC044D
  264. mwr -force 0XF8000004 0x0000767B
  265. }
  266. proc ps7_ddr_init_data_2_0 {} {
  267. mask_write 0XF8006000 0x0001FFFF 0x00000080
  268. mask_write 0XF8006004 0x1FFFFFFF 0x00081081
  269. mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
  270. mask_write 0XF800600C 0x03FFFFFF 0x02001001
  271. mask_write 0XF8006010 0x03FFFFFF 0x00014001
  272. mask_write 0XF8006014 0x001FFFFF 0x0004159B
  273. mask_write 0XF8006018 0xF7FFFFFF 0x452460D2
  274. mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
  275. mask_write 0XF8006020 0xFFFFFFFC 0x272872D0
  276. mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
  277. mask_write 0XF8006028 0x00003FFF 0x00002007
  278. mask_write 0XF800602C 0xFFFFFFFF 0x00000008
  279. mask_write 0XF8006030 0xFFFFFFFF 0x00040930
  280. mask_write 0XF8006034 0x13FF3FFF 0x000116D4
  281. mask_write 0XF8006038 0x00001FC3 0x00000000
  282. mask_write 0XF800603C 0x000FFFFF 0x00000777
  283. mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000
  284. mask_write 0XF8006044 0x0FFFFFFF 0x0FF66666
  285. mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
  286. mask_write 0XF8006050 0xFF0F8FFF 0x77010800
  287. mask_write 0XF8006058 0x0001FFFF 0x00000101
  288. mask_write 0XF800605C 0x0000FFFF 0x00005003
  289. mask_write 0XF8006060 0x000017FF 0x0000003E
  290. mask_write 0XF8006064 0x00021FE0 0x00020000
  291. mask_write 0XF8006068 0x03FFFFFF 0x00284141
  292. mask_write 0XF800606C 0x0000FFFF 0x00001610
  293. mask_write 0XF8006078 0x03FFFFFF 0x00466111
  294. mask_write 0XF800607C 0x000FFFFF 0x00032222
  295. mask_write 0XF80060A0 0x00FFFFFF 0x00008000
  296. mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
  297. mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73
  298. mask_write 0XF80060AC 0x000001FF 0x000001FE
  299. mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
  300. mask_write 0XF80060B4 0x000007FF 0x00000200
  301. mask_write 0XF80060B8 0x01FFFFFF 0x00200066
  302. mask_write 0XF80060C4 0x00000003 0x00000000
  303. mask_write 0XF80060C8 0x000000FF 0x00000000
  304. mask_write 0XF80060DC 0x00000001 0x00000000
  305. mask_write 0XF80060F0 0x0000FFFF 0x00000000
  306. mask_write 0XF80060F4 0x0000000F 0x00000008
  307. mask_write 0XF8006114 0x000000FF 0x00000000
  308. mask_write 0XF8006118 0x7FFFFFFF 0x40000001
  309. mask_write 0XF800611C 0x7FFFFFFF 0x40000001
  310. mask_write 0XF8006120 0x7FFFFFFF 0x40000001
  311. mask_write 0XF8006124 0x7FFFFFFF 0x40000001
  312. mask_write 0XF800612C 0x000FFFFF 0x00033C03
  313. mask_write 0XF8006130 0x000FFFFF 0x00034003
  314. mask_write 0XF8006134 0x000FFFFF 0x0002F400
  315. mask_write 0XF8006138 0x000FFFFF 0x00030400
  316. mask_write 0XF8006140 0x000FFFFF 0x00000035
  317. mask_write 0XF8006144 0x000FFFFF 0x00000035
  318. mask_write 0XF8006148 0x000FFFFF 0x00000035
  319. mask_write 0XF800614C 0x000FFFFF 0x00000035
  320. mask_write 0XF8006154 0x000FFFFF 0x00000083
  321. mask_write 0XF8006158 0x000FFFFF 0x00000083
  322. mask_write 0XF800615C 0x000FFFFF 0x00000080
  323. mask_write 0XF8006160 0x000FFFFF 0x00000080
  324. mask_write 0XF8006168 0x001FFFFF 0x00000124
  325. mask_write 0XF800616C 0x001FFFFF 0x00000125
  326. mask_write 0XF8006170 0x001FFFFF 0x00000112
  327. mask_write 0XF8006174 0x001FFFFF 0x00000116
  328. mask_write 0XF800617C 0x000FFFFF 0x000000C3
  329. mask_write 0XF8006180 0x000FFFFF 0x000000C3
  330. mask_write 0XF8006184 0x000FFFFF 0x000000C0
  331. mask_write 0XF8006188 0x000FFFFF 0x000000C0
  332. mask_write 0XF8006190 0xFFFFFFFF 0x10040080
  333. mask_write 0XF8006194 0x000FFFFF 0x0001FC82
  334. mask_write 0XF8006204 0xFFFFFFFF 0x00000000
  335. mask_write 0XF8006208 0x000F03FF 0x000803FF
  336. mask_write 0XF800620C 0x000F03FF 0x000803FF
  337. mask_write 0XF8006210 0x000F03FF 0x000803FF
  338. mask_write 0XF8006214 0x000F03FF 0x000803FF
  339. mask_write 0XF8006218 0x000F03FF 0x000003FF
  340. mask_write 0XF800621C 0x000F03FF 0x000003FF
  341. mask_write 0XF8006220 0x000F03FF 0x000003FF
  342. mask_write 0XF8006224 0x000F03FF 0x000003FF
  343. mask_write 0XF80062A8 0x00000FF7 0x00000000
  344. mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
  345. mask_write 0XF80062B0 0x003FFFFF 0x00005125
  346. mask_write 0XF80062B4 0x0003FFFF 0x000012A8
  347. mask_poll 0XF8000B74 0x00002000
  348. mask_write 0XF8006000 0x0001FFFF 0x00000081
  349. mask_poll 0XF8006054 0x00000007
  350. }
  351. proc ps7_mio_init_data_2_0 {} {
  352. mwr -force 0XF8000008 0x0000DF0D
  353. mask_write 0XF8000B40 0x00000FFF 0x00000600
  354. mask_write 0XF8000B44 0x00000FFF 0x00000600
  355. mask_write 0XF8000B48 0x00000FFF 0x00000672
  356. mask_write 0XF8000B4C 0x00000FFF 0x00000672
  357. mask_write 0XF8000B50 0x00000FFF 0x00000674
  358. mask_write 0XF8000B54 0x00000FFF 0x00000674
  359. mask_write 0XF8000B58 0x00000FFF 0x00000600
  360. mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C
  361. mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C
  362. mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C
  363. mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C
  364. mask_write 0XF8000B6C 0x00007FFF 0x00000209
  365. mask_write 0XF8000B70 0x00000021 0x00000021
  366. mask_write 0XF8000B70 0x00000021 0x00000020
  367. mask_write 0XF8000B70 0x07FFFFFF 0x00000823
  368. mask_write 0XF8000700 0x00003FFF 0x00000600
  369. mask_write 0XF8000704 0x00003FFF 0x00000702
  370. mask_write 0XF8000708 0x00003FFF 0x00000702
  371. mask_write 0XF800070C 0x00003FFF 0x00000702
  372. mask_write 0XF8000710 0x00003FFF 0x00000702
  373. mask_write 0XF8000714 0x00003FFF 0x00000702
  374. mask_write 0XF8000718 0x00003FFF 0x00000702
  375. mask_write 0XF800071C 0x00003FFF 0x00000600
  376. mask_write 0XF8000720 0x00003FFF 0x00000700
  377. mask_write 0XF8000724 0x00003FFF 0x00000600
  378. mask_write 0XF8000728 0x00003FFF 0x00000600
  379. mask_write 0XF800072C 0x00003FFF 0x00000600
  380. mask_write 0XF8000730 0x00003FFF 0x00000600
  381. mask_write 0XF8000734 0x00003FFF 0x00000600
  382. mask_write 0XF8000738 0x00003FFF 0x00000600
  383. mask_write 0XF800073C 0x00003FFF 0x00000600
  384. mask_write 0XF8000740 0x00003FFF 0x00000302
  385. mask_write 0XF8000744 0x00003FFF 0x00000302
  386. mask_write 0XF8000748 0x00003FFF 0x00000302
  387. mask_write 0XF800074C 0x00003FFF 0x00000302
  388. mask_write 0XF8000750 0x00003FFF 0x00000302
  389. mask_write 0XF8000754 0x00003FFF 0x00000302
  390. mask_write 0XF8000758 0x00003FFF 0x00000303
  391. mask_write 0XF800075C 0x00003FFF 0x00000303
  392. mask_write 0XF8000760 0x00003FFF 0x00000303
  393. mask_write 0XF8000764 0x00003FFF 0x00000303
  394. mask_write 0XF8000768 0x00003FFF 0x00000303
  395. mask_write 0XF800076C 0x00003FFF 0x00000303
  396. mask_write 0XF8000770 0x00003FFF 0x00000304
  397. mask_write 0XF8000774 0x00003FFF 0x00000305
  398. mask_write 0XF8000778 0x00003FFF 0x00000304
  399. mask_write 0XF800077C 0x00003FFF 0x00000305
  400. mask_write 0XF8000780 0x00003FFF 0x00000304
  401. mask_write 0XF8000784 0x00003FFF 0x00000304
  402. mask_write 0XF8000788 0x00003FFF 0x00000304
  403. mask_write 0XF800078C 0x00003FFF 0x00000304
  404. mask_write 0XF8000790 0x00003FFF 0x00000305
  405. mask_write 0XF8000794 0x00003FFF 0x00000304
  406. mask_write 0XF8000798 0x00003FFF 0x00000304
  407. mask_write 0XF800079C 0x00003FFF 0x00000304
  408. mask_write 0XF80007A0 0x00003FFF 0x00000380
  409. mask_write 0XF80007A4 0x00003FFF 0x00000380
  410. mask_write 0XF80007A8 0x00003FFF 0x00000380
  411. mask_write 0XF80007AC 0x00003FFF 0x00000380
  412. mask_write 0XF80007B0 0x00003FFF 0x00000380
  413. mask_write 0XF80007B4 0x00003FFF 0x00000380
  414. mask_write 0XF80007B8 0x00003F01 0x00000201
  415. mask_write 0XF80007BC 0x00003F01 0x00000201
  416. mask_write 0XF80007C0 0x00003FFF 0x000002E0
  417. mask_write 0XF80007C4 0x00003FFF 0x000002E1
  418. mask_write 0XF80007C8 0x00003FFF 0x00000200
  419. mask_write 0XF80007CC 0x00003FFF 0x00000200
  420. mask_write 0XF80007D0 0x00003FFF 0x00000280
  421. mask_write 0XF80007D4 0x00003FFF 0x00000280
  422. mask_write 0XF8000830 0x003F003F 0x002F002E
  423. mwr -force 0XF8000004 0x0000767B
  424. }
  425. proc ps7_peripherals_init_data_2_0 {} {
  426. mwr -force 0XF8000008 0x0000DF0D
  427. mask_write 0XF8000B48 0x00000180 0x00000180
  428. mask_write 0XF8000B4C 0x00000180 0x00000180
  429. mask_write 0XF8000B50 0x00000180 0x00000180
  430. mask_write 0XF8000B54 0x00000180 0x00000180
  431. mwr -force 0XF8000004 0x0000767B
  432. mask_write 0XE0001034 0x000000FF 0x00000006
  433. mask_write 0XE0001018 0x0000FFFF 0x0000003E
  434. mask_write 0XE0001000 0x000001FF 0x00000017
  435. mask_write 0XE0001004 0x00000FFF 0x00000020
  436. mask_write 0XE000D000 0x00080000 0x00080000
  437. mask_write 0XF8007000 0x20000000 0x00000000
  438. }
  439. proc ps7_post_config_2_0 {} {
  440. mwr -force 0XF8000008 0x0000DF0D
  441. mask_write 0XF8000900 0x0000000F 0x0000000F
  442. mask_write 0XF8000240 0xFFFFFFFF 0x00000000
  443. mwr -force 0XF8000004 0x0000767B
  444. }
  445. proc ps7_debug_2_0 {} {
  446. mwr -force 0XF8898FB0 0xC5ACCE55
  447. mwr -force 0XF8899FB0 0xC5ACCE55
  448. mwr -force 0XF8809FB0 0xC5ACCE55
  449. }
  450. proc ps7_pll_init_data_1_0 {} {
  451. mwr -force 0XF8000008 0x0000DF0D
  452. mask_write 0XF8000110 0x003FFFF0 0x000FA220
  453. mask_write 0XF8000100 0x0007F000 0x00028000
  454. mask_write 0XF8000100 0x00000010 0x00000010
  455. mask_write 0XF8000100 0x00000001 0x00000001
  456. mask_write 0XF8000100 0x00000001 0x00000000
  457. mask_poll 0XF800010C 0x00000001
  458. mask_write 0XF8000100 0x00000010 0x00000000
  459. mask_write 0XF8000120 0x1F003F30 0x1F000200
  460. mask_write 0XF8000114 0x003FFFF0 0x0012C220
  461. mask_write 0XF8000104 0x0007F000 0x00020000
  462. mask_write 0XF8000104 0x00000010 0x00000010
  463. mask_write 0XF8000104 0x00000001 0x00000001
  464. mask_write 0XF8000104 0x00000001 0x00000000
  465. mask_poll 0XF800010C 0x00000002
  466. mask_write 0XF8000104 0x00000010 0x00000000
  467. mask_write 0XF8000124 0xFFF00003 0x0C200003
  468. mask_write 0XF8000118 0x003FFFF0 0x001452C0
  469. mask_write 0XF8000108 0x0007F000 0x0001E000
  470. mask_write 0XF8000108 0x00000010 0x00000010
  471. mask_write 0XF8000108 0x00000001 0x00000001
  472. mask_write 0XF8000108 0x00000001 0x00000000
  473. mask_poll 0XF800010C 0x00000004
  474. mask_write 0XF8000108 0x00000010 0x00000000
  475. mwr -force 0XF8000004 0x0000767B
  476. }
  477. proc ps7_clock_init_data_1_0 {} {
  478. mwr -force 0XF8000008 0x0000DF0D
  479. mask_write 0XF8000128 0x03F03F01 0x00700F01
  480. mask_write 0XF8000138 0x00000011 0x00000001
  481. mask_write 0XF8000140 0x03F03F71 0x00100801
  482. mask_write 0XF800014C 0x00003F31 0x00000501
  483. mask_write 0XF8000150 0x00003F33 0x00001401
  484. mask_write 0XF8000154 0x00003F33 0x00001402
  485. mask_write 0XF8000168 0x00003F31 0x00000501
  486. mask_write 0XF8000170 0x03F03F30 0x00200400
  487. mask_write 0XF80001C4 0x00000001 0x00000001
  488. mask_write 0XF800012C 0x01FFCCCD 0x01EC044D
  489. mwr -force 0XF8000004 0x0000767B
  490. }
  491. proc ps7_ddr_init_data_1_0 {} {
  492. mask_write 0XF8006000 0x0001FFFF 0x00000080
  493. mask_write 0XF8006004 0x1FFFFFFF 0x00081081
  494. mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
  495. mask_write 0XF800600C 0x03FFFFFF 0x02001001
  496. mask_write 0XF8006010 0x03FFFFFF 0x00014001
  497. mask_write 0XF8006014 0x001FFFFF 0x0004159B
  498. mask_write 0XF8006018 0xF7FFFFFF 0x452460D2
  499. mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
  500. mask_write 0XF8006020 0xFFFFFFFC 0x272872D0
  501. mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
  502. mask_write 0XF8006028 0x00003FFF 0x00002007
  503. mask_write 0XF800602C 0xFFFFFFFF 0x00000008
  504. mask_write 0XF8006030 0xFFFFFFFF 0x00040930
  505. mask_write 0XF8006034 0x13FF3FFF 0x000116D4
  506. mask_write 0XF8006038 0x00001FC3 0x00000000
  507. mask_write 0XF800603C 0x000FFFFF 0x00000777
  508. mask_write 0XF8006040 0xFFFFFFFF 0xFFF00000
  509. mask_write 0XF8006044 0x0FFFFFFF 0x0FF66666
  510. mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
  511. mask_write 0XF8006050 0xFF0F8FFF 0x77010800
  512. mask_write 0XF8006058 0x0001FFFF 0x00000101
  513. mask_write 0XF800605C 0x0000FFFF 0x00005003
  514. mask_write 0XF8006060 0x000017FF 0x0000003E
  515. mask_write 0XF8006064 0x00021FE0 0x00020000
  516. mask_write 0XF8006068 0x03FFFFFF 0x00284141
  517. mask_write 0XF800606C 0x0000FFFF 0x00001610
  518. mask_write 0XF80060A0 0x00FFFFFF 0x00008000
  519. mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
  520. mask_write 0XF80060A8 0x0FFFFFFF 0x0690CB73
  521. mask_write 0XF80060AC 0x000001FF 0x000001FE
  522. mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
  523. mask_write 0XF80060B4 0x000007FF 0x00000200
  524. mask_write 0XF80060B8 0x01FFFFFF 0x00200066
  525. mask_write 0XF80060C4 0x00000003 0x00000000
  526. mask_write 0XF80060C8 0x000000FF 0x00000000
  527. mask_write 0XF80060DC 0x00000001 0x00000000
  528. mask_write 0XF80060F0 0x0000FFFF 0x00000000
  529. mask_write 0XF80060F4 0x0000000F 0x00000008
  530. mask_write 0XF8006114 0x000000FF 0x00000000
  531. mask_write 0XF8006118 0x7FFFFFFF 0x40000001
  532. mask_write 0XF800611C 0x7FFFFFFF 0x40000001
  533. mask_write 0XF8006120 0x7FFFFFFF 0x40000001
  534. mask_write 0XF8006124 0x7FFFFFFF 0x40000001
  535. mask_write 0XF800612C 0x000FFFFF 0x00033C03
  536. mask_write 0XF8006130 0x000FFFFF 0x00034003
  537. mask_write 0XF8006134 0x000FFFFF 0x0002F400
  538. mask_write 0XF8006138 0x000FFFFF 0x00030400
  539. mask_write 0XF8006140 0x000FFFFF 0x00000035
  540. mask_write 0XF8006144 0x000FFFFF 0x00000035
  541. mask_write 0XF8006148 0x000FFFFF 0x00000035
  542. mask_write 0XF800614C 0x000FFFFF 0x00000035
  543. mask_write 0XF8006154 0x000FFFFF 0x00000083
  544. mask_write 0XF8006158 0x000FFFFF 0x00000083
  545. mask_write 0XF800615C 0x000FFFFF 0x00000080
  546. mask_write 0XF8006160 0x000FFFFF 0x00000080
  547. mask_write 0XF8006168 0x001FFFFF 0x00000124
  548. mask_write 0XF800616C 0x001FFFFF 0x00000125
  549. mask_write 0XF8006170 0x001FFFFF 0x00000112
  550. mask_write 0XF8006174 0x001FFFFF 0x00000116
  551. mask_write 0XF800617C 0x000FFFFF 0x000000C3
  552. mask_write 0XF8006180 0x000FFFFF 0x000000C3
  553. mask_write 0XF8006184 0x000FFFFF 0x000000C0
  554. mask_write 0XF8006188 0x000FFFFF 0x000000C0
  555. mask_write 0XF8006190 0xFFFFFFFF 0x10040080
  556. mask_write 0XF8006194 0x000FFFFF 0x0001FC82
  557. mask_write 0XF8006204 0xFFFFFFFF 0x00000000
  558. mask_write 0XF8006208 0x000F03FF 0x000803FF
  559. mask_write 0XF800620C 0x000F03FF 0x000803FF
  560. mask_write 0XF8006210 0x000F03FF 0x000803FF
  561. mask_write 0XF8006214 0x000F03FF 0x000803FF
  562. mask_write 0XF8006218 0x000F03FF 0x000003FF
  563. mask_write 0XF800621C 0x000F03FF 0x000003FF
  564. mask_write 0XF8006220 0x000F03FF 0x000003FF
  565. mask_write 0XF8006224 0x000F03FF 0x000003FF
  566. mask_write 0XF80062A8 0x00000FF7 0x00000000
  567. mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
  568. mask_write 0XF80062B0 0x003FFFFF 0x00005125
  569. mask_write 0XF80062B4 0x0003FFFF 0x000012A8
  570. mask_poll 0XF8000B74 0x00002000
  571. mask_write 0XF8006000 0x0001FFFF 0x00000081
  572. mask_poll 0XF8006054 0x00000007
  573. }
  574. proc ps7_mio_init_data_1_0 {} {
  575. mwr -force 0XF8000008 0x0000DF0D
  576. mask_write 0XF8000B40 0x00000FFF 0x00000600
  577. mask_write 0XF8000B44 0x00000FFF 0x00000600
  578. mask_write 0XF8000B48 0x00000FFF 0x00000672
  579. mask_write 0XF8000B4C 0x00000FFF 0x00000672
  580. mask_write 0XF8000B50 0x00000FFF 0x00000674
  581. mask_write 0XF8000B54 0x00000FFF 0x00000674
  582. mask_write 0XF8000B58 0x00000FFF 0x00000600
  583. mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C61C
  584. mask_write 0XF8000B60 0xFFFFFFFF 0x00F9861C
  585. mask_write 0XF8000B64 0xFFFFFFFF 0x00F9861C
  586. mask_write 0XF8000B68 0xFFFFFFFF 0x00F9861C
  587. mask_write 0XF8000B6C 0x000073FF 0x00000209
  588. mask_write 0XF8000B70 0x00000021 0x00000021
  589. mask_write 0XF8000B70 0x00000021 0x00000020
  590. mask_write 0XF8000B70 0x07FFFFFF 0x00000823
  591. mask_write 0XF8000700 0x00003FFF 0x00000600
  592. mask_write 0XF8000704 0x00003FFF 0x00000702
  593. mask_write 0XF8000708 0x00003FFF 0x00000702
  594. mask_write 0XF800070C 0x00003FFF 0x00000702
  595. mask_write 0XF8000710 0x00003FFF 0x00000702
  596. mask_write 0XF8000714 0x00003FFF 0x00000702
  597. mask_write 0XF8000718 0x00003FFF 0x00000702
  598. mask_write 0XF800071C 0x00003FFF 0x00000600
  599. mask_write 0XF8000720 0x00003FFF 0x00000700
  600. mask_write 0XF8000724 0x00003FFF 0x00000600
  601. mask_write 0XF8000728 0x00003FFF 0x00000600
  602. mask_write 0XF800072C 0x00003FFF 0x00000600
  603. mask_write 0XF8000730 0x00003FFF 0x00000600
  604. mask_write 0XF8000734 0x00003FFF 0x00000600
  605. mask_write 0XF8000738 0x00003FFF 0x00000600
  606. mask_write 0XF800073C 0x00003FFF 0x00000600
  607. mask_write 0XF8000740 0x00003FFF 0x00000302
  608. mask_write 0XF8000744 0x00003FFF 0x00000302
  609. mask_write 0XF8000748 0x00003FFF 0x00000302
  610. mask_write 0XF800074C 0x00003FFF 0x00000302
  611. mask_write 0XF8000750 0x00003FFF 0x00000302
  612. mask_write 0XF8000754 0x00003FFF 0x00000302
  613. mask_write 0XF8000758 0x00003FFF 0x00000303
  614. mask_write 0XF800075C 0x00003FFF 0x00000303
  615. mask_write 0XF8000760 0x00003FFF 0x00000303
  616. mask_write 0XF8000764 0x00003FFF 0x00000303
  617. mask_write 0XF8000768 0x00003FFF 0x00000303
  618. mask_write 0XF800076C 0x00003FFF 0x00000303
  619. mask_write 0XF8000770 0x00003FFF 0x00000304
  620. mask_write 0XF8000774 0x00003FFF 0x00000305
  621. mask_write 0XF8000778 0x00003FFF 0x00000304
  622. mask_write 0XF800077C 0x00003FFF 0x00000305
  623. mask_write 0XF8000780 0x00003FFF 0x00000304
  624. mask_write 0XF8000784 0x00003FFF 0x00000304
  625. mask_write 0XF8000788 0x00003FFF 0x00000304
  626. mask_write 0XF800078C 0x00003FFF 0x00000304
  627. mask_write 0XF8000790 0x00003FFF 0x00000305
  628. mask_write 0XF8000794 0x00003FFF 0x00000304
  629. mask_write 0XF8000798 0x00003FFF 0x00000304
  630. mask_write 0XF800079C 0x00003FFF 0x00000304
  631. mask_write 0XF80007A0 0x00003FFF 0x00000380
  632. mask_write 0XF80007A4 0x00003FFF 0x00000380
  633. mask_write 0XF80007A8 0x00003FFF 0x00000380
  634. mask_write 0XF80007AC 0x00003FFF 0x00000380
  635. mask_write 0XF80007B0 0x00003FFF 0x00000380
  636. mask_write 0XF80007B4 0x00003FFF 0x00000380
  637. mask_write 0XF80007B8 0x00003F01 0x00000201
  638. mask_write 0XF80007BC 0x00003F01 0x00000201
  639. mask_write 0XF80007C0 0x00003FFF 0x000002E0
  640. mask_write 0XF80007C4 0x00003FFF 0x000002E1
  641. mask_write 0XF80007C8 0x00003FFF 0x00000200
  642. mask_write 0XF80007CC 0x00003FFF 0x00000200
  643. mask_write 0XF80007D0 0x00003FFF 0x00000280
  644. mask_write 0XF80007D4 0x00003FFF 0x00000280
  645. mask_write 0XF8000830 0x003F003F 0x002F002E
  646. mwr -force 0XF8000004 0x0000767B
  647. }
  648. proc ps7_peripherals_init_data_1_0 {} {
  649. mwr -force 0XF8000008 0x0000DF0D
  650. mask_write 0XF8000B48 0x00000180 0x00000180
  651. mask_write 0XF8000B4C 0x00000180 0x00000180
  652. mask_write 0XF8000B50 0x00000180 0x00000180
  653. mask_write 0XF8000B54 0x00000180 0x00000180
  654. mwr -force 0XF8000004 0x0000767B
  655. mask_write 0XE0001034 0x000000FF 0x00000006
  656. mask_write 0XE0001018 0x0000FFFF 0x0000003E
  657. mask_write 0XE0001000 0x000001FF 0x00000017
  658. mask_write 0XE0001004 0x00000FFF 0x00000020
  659. mask_write 0XE000D000 0x00080000 0x00080000
  660. mask_write 0XF8007000 0x20000000 0x00000000
  661. }
  662. proc ps7_post_config_1_0 {} {
  663. mwr -force 0XF8000008 0x0000DF0D
  664. mask_write 0XF8000900 0x0000000F 0x0000000F
  665. mask_write 0XF8000240 0xFFFFFFFF 0x00000000
  666. mwr -force 0XF8000004 0x0000767B
  667. }
  668. proc ps7_debug_1_0 {} {
  669. mwr -force 0XF8898FB0 0xC5ACCE55
  670. mwr -force 0XF8899FB0 0xC5ACCE55
  671. mwr -force 0XF8809FB0 0xC5ACCE55
  672. }
  673. set PCW_SILICON_VER_1_0 "0x0"
  674. set PCW_SILICON_VER_2_0 "0x1"
  675. set PCW_SILICON_VER_3_0 "0x2"
  676. set APU_FREQ 666666667
  677. proc mask_poll { addr mask } {
  678. set count 1
  679. set curval "0x[string range [mrd $addr] end-8 end]"
  680. set maskedval [expr {$curval & $mask}]
  681. while { $maskedval == 0 } {
  682. set curval "0x[string range [mrd $addr] end-8 end]"
  683. set maskedval [expr {$curval & $mask}]
  684. set count [ expr { $count + 1 } ]
  685. if { $count == 100000000 } {
  686. puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
  687. break
  688. }
  689. }
  690. }
  691. proc mask_delay { addr val } {
  692. set delay [ get_number_of_cycles_for_delay $val ]
  693. perf_reset_and_start_timer
  694. set curval "0x[string range [mrd $addr] end-8 end]"
  695. set maskedval [expr {$curval < $delay}]
  696. while { $maskedval == 1 } {
  697. set curval "0x[string range [mrd $addr] end-8 end]"
  698. set maskedval [expr {$curval < $delay}]
  699. }
  700. perf_reset_clock
  701. }
  702. proc ps_version { } {
  703. set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
  704. set mask_sil_ver "0x[expr {$si_ver >> 28}]"
  705. return $mask_sil_ver;
  706. }
  707. proc ps7_post_config {} {
  708. ps7_post_config_1_0
  709. }
  710. proc ps7_debug {} {
  711. ps7_debug_1_0
  712. }
  713. proc ps7_init {} {
  714. ps7_mio_init_data_1_0
  715. ps7_pll_init_data_1_0
  716. ps7_clock_init_data_1_0
  717. ps7_ddr_init_data_1_0
  718. ps7_peripherals_init_data_1_0
  719. }
  720. # For delay calculation using global timer
  721. # start timer
  722. proc perf_start_clock { } {
  723. #writing SCU_GLOBAL_TIMER_CONTROL register
  724. mask_write 0xF8F00208 0x00000109 0x00000009
  725. }
  726. # stop timer and reset timer count regs
  727. proc perf_reset_clock { } {
  728. perf_disable_clock
  729. mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
  730. mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
  731. }
  732. # Compute mask for given delay in miliseconds
  733. proc get_number_of_cycles_for_delay { delay } {
  734. # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
  735. variable APU_FREQ
  736. return [ expr ($delay * $APU_FREQ /(2 * 1000))]
  737. }
  738. # stop timer
  739. proc perf_disable_clock {} {
  740. mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
  741. }
  742. proc perf_reset_and_start_timer {} {
  743. perf_reset_clock
  744. perf_start_clock
  745. }