synchronization primitives #82

Merged
sb10q merged 3 commits from pca006132/artiq-zynq:master into master 2020-08-04 14:40:03 +08:00
2 changed files with 8 additions and 7 deletions
Showing only changes of commit 7a0e09df36 - Show all commits

10
src/Cargo.lock generated
View File

@ -201,7 +201,7 @@ dependencies = [
[[package]]
name = "libasync"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#25c6d5eeaa6243724700e975e3935a5965c09a27"
dependencies = [
"embedded-hal",
"libcortex_a9",
@ -213,7 +213,7 @@ dependencies = [
[[package]]
name = "libboard_zynq"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#25c6d5eeaa6243724700e975e3935a5965c09a27"
dependencies = [
"bit_field",
"embedded-hal",
@ -237,7 +237,7 @@ dependencies = [
[[package]]
name = "libcortex_a9"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#25c6d5eeaa6243724700e975e3935a5965c09a27"
dependencies = [
"bit_field",
"libregister",
@ -252,7 +252,7 @@ checksum = "c7d73b3f436185384286bd8098d17ec07c9a7d2388a6599f824d8502b529702a"
[[package]]
name = "libregister"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#25c6d5eeaa6243724700e975e3935a5965c09a27"
dependencies = [
"bit_field",
"vcell",
@ -262,7 +262,7 @@ dependencies = [
[[package]]
name = "libsupport_zynq"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
source = "git+https://git.m-labs.hk/M-Labs/zc706.git#25c6d5eeaa6243724700e975e3935a5965c09a27"
dependencies = [
"compiler_builtins",
"libboard_zynq",

View File

@ -2,6 +2,7 @@ use libboard_zynq::{gic, mpcore, println, stdio};
use libcortex_a9::{
asm,
regs::{MPIDR, SP},
spin_lock_yield, notify_spin_lock
};
use libregister::{RegisterR, RegisterW};
use core::sync::atomic::{AtomicBool, Ordering};
@ -27,7 +28,7 @@ pub unsafe extern "C" fn IRQ() {
SP.write(&mut __stack1_start as *mut _ as u32);
asm::enable_irq();
CORE1_RESTART.store(false, Ordering::Relaxed);
asm::sev();
notify_spin_lock();
main_core1();
}
}
@ -41,6 +42,6 @@ pub fn restart_core1() {
CORE1_RESTART.store(true, Ordering::Relaxed);
interrupt_controller.send_sgi(gic::InterruptId(0), gic::CPUCore::Core1.into());
while CORE1_RESTART.load(Ordering::Relaxed) {
asm::wfe();
spin_lock_yield();
}
}