Support CoreMgmt over DRTIO on Zynq Devices #323
@ -1190,12 +1190,12 @@ fn process_aux_packet(
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timer
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);
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core_manager.add_data(&data, length as usize);
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core_manager.add_config_data(&data, length as usize);
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let mut succeeded = true;
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if last {
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succeeded = core_manager.write_config().is_ok();
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core_manager.clear_data();
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core_manager.clear_config_data();
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}
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded })
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@ -46,7 +46,7 @@ pub fn clear_log() {
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pub struct Manager<'a> {
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cfg: &'a mut Config,
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last_log: Sliceable,
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current_payload: Cursor<Vec<u8>>,
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config_payload: Cursor<Vec<u8>>,
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last_value: Sliceable,
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}
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@ -55,7 +55,7 @@ impl<'a> Manager<'_> {
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Manager {
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cfg: cfg,
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last_log: Sliceable::new(0, Vec::new()),
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current_payload: Cursor::new(Vec::new()),
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config_payload: Cursor::new(Vec::new()),
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last_value: Sliceable::new(0, Vec::new()),
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}
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}
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@ -83,22 +83,22 @@ impl<'a> Manager<'_> {
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self.last_value.get_slice_satellite(data_slice)
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}
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pub fn add_data(&mut self, data: &[u8], data_len: usize) {
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self.current_payload.write_all(&data[..data_len]).unwrap();
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pub fn add_config_data(&mut self, data: &[u8], data_len: usize) {
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self.config_payload.write_all(&data[..data_len]).unwrap();
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}
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pub fn clear_data(&mut self) {
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self.current_payload.get_mut().clear();
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self.current_payload.set_position(0);
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pub fn clear_config_data(&mut self) {
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self.config_payload.get_mut().clear();
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self.config_payload.set_position(0);
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}
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pub fn write_config(&mut self) -> Result<()> {
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let key = self
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.current_payload
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.config_payload
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.read_string()
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.map_err(|_err| error!("error on reading key"))?;
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debug!("write key: {}", key);
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let value = self.current_payload.read_bytes().unwrap();
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let value = self.config_payload.read_bytes().unwrap();
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self.cfg
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.write(&key, value)
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