fix 100mhz PLL bypass support #265

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sb10q merged 3 commits from mwojcik/artiq-zynq:100mhz_support into master 2023-10-06 17:42:43 +08:00

This should fix issues @ljstephenson has. Bypassing the PLL with GTX/GTP didn't work because of mismatched frequencies of bootstrap clock (125MHz, default for RTIO) and the external clock.

Tested with both Kasli-SoC and ZC706, with an external 100MHz clock source and ext0_bypass in the config:

[     0.005274s]  INFO(runtime): gateware ident: NIST_QC2_Master
[     0.041032s]  INFO(runtime::rtio_clocking): bypassing the PLL for RTIO clock
[     0.237001s]  INFO(runtime::rtio_clocking): SYS CLK switched successfully

Do note that for ZC706 the variants with _100mhz suffix need to be used, which are now exposed in the flake. Seems like standalone is not affected by the frequency change, so that remains untouched.

For Kasli-SoC, rtio_frequency needs to be defined in the JSON file.

This should fix issues @ljstephenson has. Bypassing the PLL with GTX/GTP didn't work because of mismatched frequencies of bootstrap clock (125MHz, default for RTIO) and the external clock. Tested with both Kasli-SoC and ZC706, with an external 100MHz clock source and ``ext0_bypass`` in the config: ``` [ 0.005274s] INFO(runtime): gateware ident: NIST_QC2_Master [ 0.041032s] INFO(runtime::rtio_clocking): bypassing the PLL for RTIO clock [ 0.237001s] INFO(runtime::rtio_clocking): SYS CLK switched successfully ``` Do note that for ZC706 the variants with ``_100mhz`` suffix need to be used, which are now exposed in the flake. Seems like standalone is not affected by the frequency change, so that remains untouched. For Kasli-SoC, ``rtio_frequency`` needs to be defined in the JSON file.
mwojcik added 3 commits 2023-10-06 15:44:29 +08:00
mwojcik force-pushed 100mhz_support from cb10903899 to 9bd07b0759 2023-10-06 16:25:37 +08:00 Compare
mwojcik force-pushed 100mhz_support from 9bd07b0759 to ecd4ca333c 2023-10-06 16:27:27 +08:00 Compare
sb10q merged commit ecd4ca333c into master 2023-10-06 17:42:43 +08:00
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Reference: M-Labs/artiq-zynq#265
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