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Fix mismatched signatures for the wide interface #229

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sb10q merged 1 commits from jcoates/artiq-zynq:fix-wide-interface into master 2023-04-17 09:24:31 +08:00
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jcoates commented 2023-04-13 00:06:18 +08:00

See #76.

Lists are passed by-reference from python code, and so should be &CSlice<_> not CSlice<_>. This change was made for the cache already in ae0d724bf8, but not for the wide interface.

A quick grep for extern.*CSlice suggests these are the only remaining functions with a mismatched signature.

See #76. Lists are passed by-reference from python code, and so should be `&CSlice<_>` not `CSlice<_>`. This change was made for the cache already in ae0d724bf802d17b67e2032e00abb83d2ff79b66, but not for the wide interface. A quick grep for `extern.*CSlice` suggests these are the only remaining functions with a mismatched signature.
jcoates added 1 commit 2023-04-13 00:06:18 +08:00
2a4e00375c Fix mismatched signatures for the wide interface 
Lists are passed by-reference from python code, and so should be
&CSlice<_> not CSlice<_>.
sb10q commented 2023-04-13 09:08:53 +08:00
Owner

Seems to make sense. Did you actually test this?

Seems to make sense. Did you actually test this?
jcoates commented 2023-04-13 17:30:20 +08:00
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Yes - connected an oscciliscope to a fastino and can confirm it produces the right voltages both using DMA and writing events directly.

There are still some other issues with using the wide interface (we're seeing a lot of RTIO collision errors), but I'm not sure if that's a Kasli-SoC specific issue. I want to test on Kasli 2.0 before reporting anything.

Yes - connected an oscciliscope to a fastino and can confirm it produces the right voltages both using DMA and writing events directly. There are still some other issues with using the wide interface (we're seeing a lot of RTIO collision errors), but I'm not sure if that's a Kasli-SoC specific issue. I want to test on Kasli 2.0 before reporting anything.
sb10q merged commit 8cb6cf6094 into master 2023-04-17 09:24:31 +08:00
jcoates deleted branch fix-wide-interface 2023-06-08 22:54:44 +08:00
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Reference: M-Labs/artiq-zynq#229
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