M-Labs/artiq-zynq
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Clock input settings improvements #152

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sb10q merged 12 commits from mwojcik/artiq-zynq:clock_input_improv into master 2021-11-29 11:18:00 +08:00
Conversation 7 Commits 12 Files Changed 4 +9 -8
1 changed files with 9 additions and 8 deletions
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Showing only changes of commit d772a94265 - Show all commits

17
src/runtime/src/rtio_clocking.rs
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@ -1,14 +1,15 @@
use log::{info, warn}; use log::{info, warn};
use libboard_zynq::{timer::GlobalTimer}; use libboard_zynq::timer::GlobalTimer;
use embedded_hal::blocking::delay::DelayMs; use embedded_hal::blocking::delay::DelayMs;
use libconfig::Config; use libconfig::Config;
use libboard_artiq::pl; use libboard_artiq::pl;
#[cfg(has_si5324)]
use libboard_zynq::i2c::I2c;
#[cfg(has_si5324)]
use crate::i2c; use crate::i2c;
#[cfg(has_si5324)] #[cfg(has_si5324)]
use libboard_artiq::si5324; use libboard_artiq::si5324;
#[derive(Debug, PartialEq, Copy, Clone)] #[derive(Debug, PartialEq, Copy, Clone)]
#[allow(non_camel_case_types)] #[allow(non_camel_case_types)]
pub enum RtioClock { pub enum RtioClock {
@ -90,7 +91,7 @@ fn init_drtio(timer: &mut GlobalTimer)
} }
#[cfg(has_si5324)] #[cfg(has_si5324)]
fn setup_si5324(timer: &mut GlobalTimer, clk: RtioClock) { fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
let mut si5324_settings: Option<si5324::FrequencySettings> = None; let mut si5324_settings: Option<si5324::FrequencySettings> = None;
// 125MHz output, from crystal, 7 Hz // 125MHz output, from crystal, 7 Hz
if si5324_settings.is_none() || clk == RtioClock::Int_125 { if si5324_settings.is_none() || clk == RtioClock::Int_125 {
@ -107,8 +108,7 @@ fn setup_si5324(timer: &mut GlobalTimer, clk: RtioClock) {
}); });
} }
let si5324_ref_input = si5324::Input::Ckin2; let si5324_ref_input = si5324::Input::Ckin2;
si5324::setup(unsafe { (&mut i2c::I2C_BUS).as_mut().unwrap() }, si5324::setup(i2c, &si5324_settings.unwrap(), si5324_ref_input, timer).expect("cannot initialize Si5324");
&si5324_settings.unwrap(), si5324_ref_input, timer).expect("cannot initialize Si5324");
} }
pub fn init(timer: &mut GlobalTimer, cfg: &Config) { pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
@ -116,10 +116,11 @@ pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
let clk = get_rtio_clock_cfg(cfg); let clk = get_rtio_clock_cfg(cfg);
#[cfg(has_si5324)] #[cfg(has_si5324)]
{ {
let i2c = unsafe { (&mut i2c::I2C_BUS).as_mut().unwrap() };
let si5324_ext_input = si5324::Input::Ckin2; let si5324_ext_input = si5324::Input::Ckin2;
match clk { match clk {
RtioClock::Ext0_Bypass => si5324::bypass(si5324_ext_input).expect("cannot bypass Si5324"), RtioClock::Ext0_Bypass => si5324::bypass(i2c, si5324_ext_input, timer).expect("cannot bypass Si5324"),
_ => setup_si5324(timer, clk), _ => setup_si5324(i2c, timer, clk),
} }
} }
#[cfg(has_drtio)] #[cfg(has_drtio)]