Clock input settings improvements #152
@ -1,14 +1,15 @@
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use log::{info, warn};
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use libboard_zynq::{timer::GlobalTimer};
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use libboard_zynq::timer::GlobalTimer;
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use embedded_hal::blocking::delay::DelayMs;
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use libconfig::Config;
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use libboard_artiq::pl;
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#[cfg(has_si5324)]
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use libboard_zynq::i2c::I2c;
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#[cfg(has_si5324)]
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use crate::i2c;
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#[cfg(has_si5324)]
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use libboard_artiq::si5324;
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#[derive(Debug, PartialEq, Copy, Clone)]
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#[allow(non_camel_case_types)]
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pub enum RtioClock {
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@ -90,7 +91,7 @@ fn init_drtio(timer: &mut GlobalTimer)
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}
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#[cfg(has_si5324)]
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fn setup_si5324(timer: &mut GlobalTimer, clk: RtioClock) {
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fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
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let mut si5324_settings: Option<si5324::FrequencySettings> = None;
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// 125MHz output, from crystal, 7 Hz
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if si5324_settings.is_none() || clk == RtioClock::Int_125 {
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@ -107,8 +108,7 @@ fn setup_si5324(timer: &mut GlobalTimer, clk: RtioClock) {
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});
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}
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let si5324_ref_input = si5324::Input::Ckin2;
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si5324::setup(unsafe { (&mut i2c::I2C_BUS).as_mut().unwrap() },
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&si5324_settings.unwrap(), si5324_ref_input, timer).expect("cannot initialize Si5324");
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si5324::setup(i2c, &si5324_settings.unwrap(), si5324_ref_input, timer).expect("cannot initialize Si5324");
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}
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pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
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@ -116,10 +116,11 @@ pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
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let clk = get_rtio_clock_cfg(cfg);
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#[cfg(has_si5324)]
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{
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let i2c = unsafe { (&mut i2c::I2C_BUS).as_mut().unwrap() };
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let si5324_ext_input = si5324::Input::Ckin2;
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match clk {
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RtioClock::Ext0_Bypass => si5324::bypass(si5324_ext_input).expect("cannot bypass Si5324"),
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_ => setup_si5324(timer, clk),
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RtioClock::Ext0_Bypass => si5324::bypass(i2c, si5324_ext_input, timer).expect("cannot bypass Si5324"),
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_ => setup_si5324(i2c, timer, clk),
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}
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}
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#[cfg(has_drtio)]
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