M-Labs/artiq-zynq
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Clock input settings improvements #152

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sb10q merged 12 commits from mwojcik/artiq-zynq:clock_input_improv into master 2021-11-29 11:18:00 +08:00
Conversation 7 Commits 12 Files Changed 4 +14 -1
1 changed files with 14 additions and 1 deletions
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Showing only changes of commit 7ecee2b3ee - Show all commits

15
src/runtime/src/rtio_clocking.rs
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@ -99,7 +99,7 @@ fn init_drtio(timer: &mut GlobalTimer)
#[cfg(has_si5324)] #[cfg(has_si5324)]
fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) { fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
let si5324_settings = match clk { let si5324_settings = match clk {
_ => { // 125MHz output, from crystal, 7 Hz, default, also covers RtioClock::Int_125 RtioClock::Int_125 => { // 125MHz output, from crystal, 7 Hz
info!("using internal 125MHz RTIO clock"); info!("using internal 125MHz RTIO clock");
si5324::FrequencySettings { si5324::FrequencySettings {
n1_hs : 10, n1_hs : 10,
@ -112,6 +112,19 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
crystal_ref: true crystal_ref: true
} }
} }
_ => { // same setting as Int_125, but fallback to default
warn!("rtio_clock setting '{:x}' is unsupported. Falling back to default internal 125MHz RTIO clock.");
si5324::FrequencySettings {
n1_hs : 10,
nc1_ls : 4,
n2_hs : 10,
n2_ls : 19972,
n31 : 4565,
n32 : 4565,
bwsel : 4,
crystal_ref: true
}
}
}; };
let si5324_ref_input = si5324::Input::Ckin2; let si5324_ref_input = si5324::Input::Ckin2;
si5324::setup(i2c, &si5324_settings, si5324_ref_input, timer).expect("cannot initialize Si5324"); si5324::setup(i2c, &si5324_settings, si5324_ref_input, timer).expect("cannot initialize Si5324");