DRTIO port - satman firmware #136

Merged
sb10q merged 6 commits from mwojcik/artiq-zynq:drtio_satman into master 2021-10-08 16:04:50 +08:00
2 changed files with 0 additions and 92 deletions
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INCLUDE generated/output_format.ld
INCLUDE generated/regions.ld
ENTRY(_reset_handler)
SECTIONS
{
.vectors :
{
*(.vectors)
} > main_ram
.text :
{
*(.text .text.*)
} > main_ram
/* https://sourceware.org/bugzilla/show_bug.cgi?id=20475 */
.got :
{
PROVIDE(_GLOBAL_OFFSET_TABLE_ = .);
*(.got)
} > main_ram
.got.plt :
{
*(.got.plt)
} > main_ram
.rodata :
{
_frodata = .;
*(.rodata .rodata.*)
_erodata = .;
} > main_ram
.data :
{
*(.data .data.*)
} > main_ram
.bss ALIGN(4) :
{
_fbss = .;
*(.bss .bss.*)
. = ALIGN(4);
_ebss = .;
} > main_ram
.stack :
{
_estack = .;
. += 0x10000;
_fstack = . - 4;
} > main_ram
}

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pub const INIT: u8 = 0x00;
pub const PRINT_STATUS: u8 = 0x01;
pub const PRBS: u8 = 0x02;
pub const STPL: u8 = 0x03;
pub const SYSREF_DELAY_DAC: u8 = 0x10;
pub const SYSREF_SLIP: u8 = 0x11;
pub const SYNC: u8 = 0x12;
pub const DDMTD_SYSREF_RAW: u8 = 0x20;
pub const DDMTD_SYSREF: u8 = 0x21;
fn average_2phases(a: i32, b: i32, modulo: i32) -> i32 {
let diff = ((a - b + modulo/2 + modulo) % modulo) - modulo/2;
return (modulo + b + diff/2) % modulo;
}
pub fn average_phases(phases: &[i32], modulo: i32) -> i32 {
if phases.len() == 1 {
panic!("input array length must be a power of 2");
} else if phases.len() == 2 {
average_2phases(phases[0], phases[1], modulo)
} else {
let cut = phases.len()/2;
average_2phases(
average_phases(&phases[..cut], modulo),
average_phases(&phases[cut..], modulo),
modulo)
}
}
pub const RAW_DDMTD_N_SHIFT: i32 = 6;
pub const RAW_DDMTD_N: i32 = 1 << RAW_DDMTD_N_SHIFT;
pub const DDMTD_DITHER_BITS: i32 = 1;
pub const DDMTD_N_SHIFT: i32 = RAW_DDMTD_N_SHIFT + DDMTD_DITHER_BITS;
pub const DDMTD_N: i32 = 1 << DDMTD_N_SHIFT;