boot fails on NIST board #94
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Reference: M-Labs/artiq-zynq#94
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This problem also occur before when the L2 cache is not configured correctly, but it is gone after configuring the cache and the maintenance operations properly.
However, I think the current master do not have L2 cache enabled yet?
Probably another bug in the DDR system which shows up on the slightly different hardware they have. The current master passes HITL CI which involves the SDRAM...
I will re-enable the FSBL images and ask them to test. Eventually we'll probably need access to a problematic board...
Their board works with FSBL.
Seems resolved.