kernel takeover + idle kernel #32
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Reference: M-Labs/artiq-zynq#32
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ARTIQ coredev
magic string), then any other established control connections must be terminated, including any kernels they may have started.Current path being explored is to send a IRQ to core1 to terminate the kernel, and call the unwinder from the ISR.
Advantage of this technique is we can use the multicore Rust features throughout the runtime, which otherwise break if we reset core1 (for example, Rust cannot handle core1 being reset while it's holding a mutex).
An alternative pathway:
handle_connection
future) before handling the new connection. This is implemented in PR #45.All kernel interaction should be handled in
handle_connection
, dropping thehandle_connection
should drop all handles related to core1 (memory, Rc, mutex).Later reset should be safe as we do not have dangling pointer pointing to memory allocated by core1.
Rules 3 and 4 make sure that we would not have resource leakage or corruption in core0 resources when we reset core1. Core1 resource corruption is not a problem as there is no reference to core1 resources by rule 1.
Critical sections that I can currently think of include:
Possible workaround: introduce an unsafe function for resetting the mutex, and reset the mutex when we initialize the allocator.
Arc<Vec<u8>>
from core0, so we have to wait until kernel finishes loading to decrement the reference count.sync_channel
would leak memory in this scheme, assync_channel
usesInto<Box<T>>
which would allocate the message in core0 if sent from core0.If core1 get reset when handling the message (before dropping it), the memory would be leaked.
I wonder if it would be possible to make the box in core1 heap from core0, maybe manually calling the allocator or something.
Implementation: https://git.m-labs.hk/pca006132/artiq-zynq/src/branch/better-reset
Not really covered all the cases mentioned above yet, such as the allocator lock.
Another point for doing reset: if the kernel encounters OOM, we could just somehow signal core0 from the panic handler in core1, and just resume operation by resetting core1, without affecting core0.
Done in #79