satman: init gateware, set log level

default.nix

@@ -69,6 +69,7 @@ let
         mkdir $out
         ln -s ${szl}/szl.elf $out
         ln -s ${firmware}/runtime.bin $out
+        ln -s ${firmware}/satman.bin $out
         ln -s ${gateware}/top.bit $out
       '';
     sd = pkgs.runCommand "${target}-${variant}-sd"

remote_run.sh

@@ -20,8 +20,9 @@ impure_dir="build"
 sshopts=""
 load_bitstream=1
 board_host="192.168.1.52"
+fw_type="runtime"
 
-while getopts "h:id:o:l" opt; do
+while getopts "h:id:o:lt:" opt; do
     case "$opt" in
     \?) exit 1
         ;;
@@ -38,6 +39,8 @@ while getopts "h:id:o:l" opt; do
         ;;
     b)  board_host=$OPTARG
         ;;
+    t)  fw_type=$OPTARG
+        ;;
     esac
 done
 
@@ -53,12 +56,12 @@ if [ $impure -eq 1 ]; then
     if [ $load_bitstream -eq 1 ]; then
         load_bitstream_cmd="-g build/gateware/top.bit"
     fi
-    firmware="build/runtime.bin"
+    firmware="build/$fw_type.bin"
 else
     if [ $load_bitstream -eq 1 ]; then
         load_bitstream_cmd="-g $pure_dir/top.bit"
     fi
-    firmware="$pure_dir/runtime.bin"    
+    firmware="$pure_dir/$fw_type.bin"    
 fi
 echo "Programming board..."
 ssh $sshopts $target_host "cd $target_folder; openocd -f zc706.cfg -c'load_image szl.elf; resume 0; exit'"

src/satman/src/main.rs

@@ -18,7 +18,7 @@ extern crate unwind;
 
 extern crate alloc;
 
-use libboard_zynq::{i2c::I2c, timer::GlobalTimer, time::Milliseconds, print, println, mpcore, gic, stdio};
+use libboard_zynq::{i2c::I2c, timer::GlobalTimer, time::Milliseconds, print, println, mpcore, gic, stdio, slcr};
 use libsupport_zynq::ram;
 #[cfg(has_si5324)]
 use libboard_artiq::si5324;
@@ -33,6 +33,29 @@ use libregister::{RegisterW, RegisterR};
 
 mod repeater;
 
+fn init_gateware() {
+    // Set up PS->PL clocks
+    slcr::RegisterBlock::unlocked(|slcr| {
+        // As we are touching the mux, the clock may glitch, so reset the PL.
+        slcr.fpga_rst_ctrl.write(
+            slcr::FpgaRstCtrl::zeroed()
+                .fpga0_out_rst(true)
+                .fpga1_out_rst(true)
+                .fpga2_out_rst(true)
+                .fpga3_out_rst(true)
+        );
+        slcr.fpga0_clk_ctrl.write(
+            slcr::Fpga0ClkCtrl::zeroed()
+                .src_sel(slcr::PllSource::IoPll)
+                .divisor0(8)
+                .divisor1(1)
+        );
+        slcr.fpga_rst_ctrl.write(
+            slcr::FpgaRstCtrl::zeroed()
+        );
+    });
+}
+
 fn drtiosat_reset(reset: bool) {
     unsafe {
         csr::drtiosat::reset_write(if reset { 1 } else { 0 });
@@ -447,8 +470,10 @@ pub extern fn main_core0() -> i32 {
     };
     buffer_logger.set_uart_log_level(log::LevelFilter::Info);
     buffer_logger.register();
+    log::set_max_level(log::LevelFilter::Info);
     
     //probably will have to copy init_gateware() from runtime here too
+    init_gateware();
 
     info!("ARTIQ satellite manager starting...");
     info!("gateware ident {}", identifier_read(&mut [0; 64]));