M-Labs/artiq-zynq
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subkernel: fix DMA return control to wrong master

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This commit is contained in:
mwojcik 2024-01-31 17:08:35 +08:00
parent f0f81dbf8a
commit facc98058c
1 changed files with 2 additions and 1 deletions
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3
src/libksupport/src/kernel/dma.rs
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@ -170,6 +170,7 @@ pub extern "C" fn dma_playback(timestamp: i64, ptr: i32, _uses_ddma: bool) {
csr::rtio_dma::base_address_write(ptr as u32);
csr::rtio_dma::time_offset_write(timestamp as u64);
let old_cri_master = csr::cri_con::selected_read();
csr::cri_con::selected_write(1);
csr::rtio_dma::enable_write(1);
#[cfg(has_drtio)]
@ -183,7 +184,7 @@ pub extern "C" fn dma_playback(timestamp: i64, ptr: i32, _uses_ddma: bool) {
});
}
while csr::rtio_dma::enable_read() != 0 {}
csr::cri_con::selected_write(0);
csr::cri_con::selected_write(old_cri_master);
let error = csr::rtio_dma::error_read();
if error != 0 {