diff --git a/runtime/src/kernel.rs b/runtime/src/kernel.rs
index d20d2d3..9dfb157 100644
--- a/runtime/src/kernel.rs
+++ b/runtime/src/kernel.rs
@@ -6,7 +6,6 @@ use libcortex_a9::{mutex::Mutex, sync_channel::{self, sync_channel}};
 use libsupport_zynq::boot::Core1;
 
 use dyld;
-use crate::pl::csr;
 use crate::rtio;
 
 
@@ -75,8 +74,9 @@ macro_rules! api {
 
 fn resolve(required: &[u8]) -> Option<u32> {
     let api = &[
-        /* proxified syscalls */
-        api!(now = csr::rtio::NOW_HI_ADDR as *const _),
+        api!(now_mu = rtio::now_mu),
+        api!(at_mu = rtio::at_mu),
+        api!(delay_mu = rtio::delay_mu),
 
         api!(rtio_init = rtio::init),
         api!(rtio_get_destination_status = rtio::get_destination_status),
diff --git a/runtime/src/rtio.rs b/runtime/src/rtio.rs
index 495c322..ec8a0ac 100644
--- a/runtime/src/rtio.rs
+++ b/runtime/src/rtio.rs
@@ -36,6 +36,24 @@ pub extern fn get_counter() -> i64 {
     }
 }
 
+pub extern fn now_mu() -> i64 {
+    unsafe {
+        csr::rtio::now_read() as i64
+    }
+}
+
+pub extern fn at_mu(t: i64) {
+    unsafe {
+        csr::rtio::now_write(t as u64);
+    }
+}
+
+pub extern fn delay_mu(dt: i64) {
+    unsafe {
+        csr::rtio::now_write(csr::rtio::now_read() + dt as u64);
+    }
+}
+
 // writing the LSB of o_data (offset=0) triggers the RTIO write
 #[inline(always)]
 pub unsafe fn rtio_o_data_write(offset: usize, data: u32) {
@@ -52,7 +70,7 @@ pub unsafe fn rtio_i_data_read(offset: usize) -> u32 {
 
 #[inline(never)]
 unsafe fn process_exceptional_status(channel: i32, status: u8) {
-    let timestamp = *(csr::rtio::NOW_HI_ADDR as *const i64);
+    let timestamp = csr::rtio::now_read() as i64;
     if status & RTIO_O_STATUS_WAIT != 0 {
         while csr::rtio::o_status_read() & RTIO_O_STATUS_WAIT != 0 {}
     }
diff --git a/zc706.py b/zc706.py
index fab0c5b..c6cd7d8 100755
--- a/zc706.py
+++ b/zc706.py
@@ -41,7 +41,7 @@ class ZC706(SoCCore):
         self.submodules.rtio_tsc = rtio.TSC("async", glbl_fine_ts_width=3)
         self.submodules.rtio_core = rtio.Core(self.rtio_tsc, rtio_channels)
         self.csr_devices.append("rtio_core")
-        self.submodules.rtio = rtio.KernelInitiator(self.rtio_tsc)
+        self.submodules.rtio = rtio.KernelInitiator(self.rtio_tsc, now64=True)
         self.csr_devices.append("rtio")
 
         self.comb += self.rtio.cri.connect(self.rtio_core.cri)