drtio: crc from mainline, removed byte swap
This commit is contained in:
parent
4218354e65
commit
e8db2a4b49
src/libboard_artiq/src
@ -1,7 +1,7 @@
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use crc;
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use crc;
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use core_io::{ErrorKind as IoErrorKind, Error as IoError};
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use core_io::{ErrorKind as IoErrorKind, Error as IoError};
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use core::slice;
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use io::{proto::ProtoRead, proto::ProtoWrite, Cursor};
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use io::{proto::ProtoRead, proto::ProtoWrite, Cursor};
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use libboard_zynq::{timer::GlobalTimer, time::Milliseconds};
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use libboard_zynq::{timer::GlobalTimer, time::Milliseconds};
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use crate::mem::mem::DRTIOAUX_MEM;
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use crate::mem::mem::DRTIOAUX_MEM;
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@ -58,22 +58,14 @@ pub fn has_rx_error(linkno: u8) -> bool {
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}
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}
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}
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}
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pub fn copy_with_swap(src: *mut u8, dst: *mut u8, len: isize) {
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pub fn copy_work_buffer(src: *mut u32, dst: *mut u32, len: isize) {
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// for some reason, everything except checksum arrives
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// AXI writes must be 4-byte aligned (drtio proto doesn't care for that),
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// with byte order swapped. and it must be sent as such too.
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// and AXI burst writes are not implemented yet in gateware
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// thus the need for a work buffer for transmitting and copying it over
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unsafe {
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unsafe {
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for i in (0..(len-4)).step_by(4) {
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for i in 0..(len/4) {
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*dst.offset(i) = *src.offset(i+3);
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*dst.offset(i) = *src.offset(i);
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*dst.offset(i+1) = *src.offset(i+2);
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*dst.offset(i+2) = *src.offset(i+1);
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*dst.offset(i+3) = *src.offset(i);
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}
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}
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// checksum untouched
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// unrolled for performance
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*dst.offset(len-4) = *src.offset(len-4);
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*dst.offset(len-3) = *src.offset(len-3);
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*dst.offset(len-2) = *src.offset(len-2);
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*dst.offset(len-1) = *src.offset(len-1);
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}
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}
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}
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}
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@ -85,10 +77,7 @@ fn receive<F, T>(linkno: u8, f: F) -> Result<Option<T>, Error>
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if (DRTIOAUX[linkidx].aux_rx_present_read)() == 1 {
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if (DRTIOAUX[linkidx].aux_rx_present_read)() == 1 {
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u8;
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u8;
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let len = (DRTIOAUX[linkidx].aux_rx_length_read)() as usize;
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let len = (DRTIOAUX[linkidx].aux_rx_length_read)() as usize;
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// work buffer, as byte order will need to be swapped, cannot be in place
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let result = f(slice::from_raw_parts(ptr as *mut u8, len as usize));
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let mut buf: [u8; 1024] = [0; 1024];
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copy_with_swap(ptr, buf.as_mut_ptr(), len as isize);
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let result = f(&buf[0..len]);
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(DRTIOAUX[linkidx].aux_rx_present_write)(1);
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(DRTIOAUX[linkidx].aux_rx_present_write)(1);
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Ok(Some(result?))
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Ok(Some(result?))
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} else {
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} else {
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@ -141,12 +130,12 @@ fn transmit<F>(linkno: u8, f: F) -> Result<(), Error>
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let linkno = linkno as usize;
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let linkno = linkno as usize;
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unsafe {
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unsafe {
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while (DRTIOAUX[linkno].aux_tx_read)() != 0 {}
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while (DRTIOAUX[linkno].aux_tx_read)() != 0 {}
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u8;
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u32;
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let len = DRTIOAUX_MEM[linkno].size / 2;
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let len = DRTIOAUX_MEM[linkno].size / 2;
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// work buffer, works with unaligned mem access
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// work buffer, works with unaligned mem access
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let mut buf: [u8; 1024] = [0; 1024];
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let mut buf: [u8; 1024] = [0; 1024];
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let len = f(&mut buf[0..len])?;
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let len = f(&mut buf[0..len])?;
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copy_with_swap(buf.as_mut_ptr(), ptr, len as isize);
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copy_work_buffer(buf.as_mut_ptr() as *mut u32, ptr, len as isize);
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(DRTIOAUX[linkno].aux_tx_length_write)(len as u16);
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(DRTIOAUX[linkno].aux_tx_length_write)(len as u16);
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(DRTIOAUX[linkno].aux_tx_write)(1);
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(DRTIOAUX[linkno].aux_tx_write)(1);
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Ok(())
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Ok(())
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@ -1,6 +1,7 @@
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use crc;
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use crc;
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use core_io::{ErrorKind as IoErrorKind, Error as IoError};
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use core_io::{ErrorKind as IoErrorKind, Error as IoError};
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use core::slice;
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use void::Void;
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use void::Void;
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use nb;
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use nb;
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@ -10,7 +11,7 @@ use libasync::{task, block_async};
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use io::{proto::ProtoRead, proto::ProtoWrite, Cursor};
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use io::{proto::ProtoRead, proto::ProtoWrite, Cursor};
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use crate::mem::mem::DRTIOAUX_MEM;
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use crate::mem::mem::DRTIOAUX_MEM;
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use crate::pl::csr::DRTIOAUX;
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use crate::pl::csr::DRTIOAUX;
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use crate::drtioaux::{Error, has_rx_error, copy_with_swap};
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use crate::drtioaux::{Error, has_rx_error, copy_work_buffer};
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pub use crate::drtioaux_proto::Packet;
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pub use crate::drtioaux_proto::Packet;
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@ -44,10 +45,7 @@ async fn receive<F, T>(linkno: u8, f: F) -> Result<Option<T>, Error>
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if (DRTIOAUX[linkidx].aux_rx_present_read)() == 1 {
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if (DRTIOAUX[linkidx].aux_rx_present_read)() == 1 {
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u8;
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u8;
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let len = (DRTIOAUX[linkidx].aux_rx_length_read)() as usize;
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let len = (DRTIOAUX[linkidx].aux_rx_length_read)() as usize;
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// work buffer, as byte order will need to be swapped, cannot be in place
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let result = f(slice::from_raw_parts(ptr as *mut u8, len as usize));
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let mut buf: [u8; 1024] = [0; 1024];
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copy_with_swap(ptr, buf.as_mut_ptr(), len as isize);
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let result = f(&buf[0..len]);
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(DRTIOAUX[linkidx].aux_rx_present_write)(1);
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(DRTIOAUX[linkidx].aux_rx_present_write)(1);
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Ok(Some(result?))
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Ok(Some(result?))
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} else {
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} else {
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@ -106,12 +104,12 @@ async fn transmit<F>(linkno: u8, f: F) -> Result<(), Error>
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let linkno = linkno as usize;
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let linkno = linkno as usize;
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unsafe {
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unsafe {
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let _ = block_async!(tx_ready(linkno)).await;
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let _ = block_async!(tx_ready(linkno)).await;
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u8;
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u32;
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let len = DRTIOAUX_MEM[linkno].size / 2;
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let len = DRTIOAUX_MEM[linkno].size / 2;
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// work buffer, works with unaligned mem access
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// work buffer, works with unaligned mem access
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let mut buf: [u8; 1024] = [0; 1024];
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let mut buf: [u8; 1024] = [0; 1024];
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let len = f(&mut buf[0..len])?;
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let len = f(&mut buf[0..len])?;
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copy_with_swap(buf.as_mut_ptr(), ptr, len as isize);
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copy_work_buffer(buf.as_mut_ptr() as *mut u32, ptr, len as isize);
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(DRTIOAUX[linkno].aux_tx_length_write)(len as u16);
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(DRTIOAUX[linkno].aux_tx_length_write)(len as u16);
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(DRTIOAUX[linkno].aux_tx_write)(1);
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(DRTIOAUX[linkno].aux_tx_write)(1);
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Ok(())
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Ok(())
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