force cargo to use our copy of zynq-rs
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parent
b9a0bcabeb
commit
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8
.gitignore
vendored
8
.gitignore
vendored
@ -3,3 +3,11 @@ examples/*.elf
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__pycache__
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build
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src/libboard_artiq/Cargo.toml
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src/libc/Cargo.toml
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src/libdyld/Cargo.toml
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src/libio/Cargo.toml
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src/libksupport/Cargo.toml
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src/runtime/Cargo.toml
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src/satman/Cargo.toml
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@ -58,7 +58,6 @@ Notes:
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- When calling make, you need to specify both the variant and firmware type.
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- Firmware type must be either ``runtime`` for DRTIO-less or DRTIO master variants, or ``satman`` for DRTIO satellite.
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- If the board is connected to the local machine, use the ``local_run.sh`` script.
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- To update ``zynq-rs``, update the cargo files as per usual for Rust projects, but also keep ``flake.lock`` in sync.
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License
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-------
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18
flake.nix
18
flake.nix
@ -122,9 +122,6 @@
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src = ./src;
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cargoLock = {
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lockFile = src/Cargo.lock;
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outputHashes = {
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"libasync-0.0.0" = "sha256-MppR7yxs3cjG7tQc82vX0MhyN71CJL2QWkM65F5hrFU=";
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};
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};
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nativeBuildInputs = [
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@ -138,6 +135,7 @@
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export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
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export CLANG_EXTRA_INCLUDE_DIR="${pkgs.llvmPackages_9.clang-unwrapped.lib}/lib/clang/9.0.1/include"
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export CARGO_HOME=$(mktemp -d cargo-home.XXX)
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export ZYNQ_RS=${zynq-rs}
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make TARGET=${target} GWARGS="${if json == null then "-V ${variant}" else json}" ${fwtype}
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'';
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@ -251,18 +249,19 @@
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'';
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};
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fmt-check = pkgs.stdenv.mkDerivation {
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fmt-check = pkgs.stdenvNoCC.mkDerivation {
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name = "fmt-check";
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nativeBuildInputs = [
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rust
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];
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src = ./src;
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phases = [ "buildPhase" ];
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nativeBuildInputs = [ rust pkgs.gnumake ];
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phases = [ "unpackPhase" "buildPhase" ];
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buildPhase =
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''
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cd ${self}/src
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export ZYNQ_RS=${zynq-rs}
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make manifests
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cargo fmt -- --check
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touch $out
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'';
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@ -381,6 +380,7 @@
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];
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XARGO_RUST_SRC = "${rust}/lib/rustlib/src/rust/library";
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CLANG_EXTRA_INCLUDE_DIR = "${pkgs.llvmPackages_9.clang-unwrapped.lib}/lib/clang/9.0.1/include";
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ZYNQ_RS = "${zynq-rs}";
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OPENOCD_ZYNQ = "${zynq-rs}/openocd";
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SZL = "${zynqpkgs.szl}";
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};
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7
src/Cargo.lock
generated
7
src/Cargo.lock
generated
@ -242,13 +242,13 @@ dependencies = [
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"log_buffer",
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"nb 0.1.3",
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"unwind",
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"vcell",
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"void",
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]
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[[package]]
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name = "libasync"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
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dependencies = [
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"embedded-hal",
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"libcortex_a9",
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@ -280,7 +280,6 @@ dependencies = [
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[[package]]
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name = "libboard_zynq"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
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dependencies = [
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"bit_field",
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"embedded-hal",
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@ -305,7 +304,6 @@ dependencies = [
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[[package]]
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name = "libconfig"
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version = "0.1.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
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dependencies = [
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"core_io",
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"fatfs",
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@ -316,7 +314,6 @@ dependencies = [
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[[package]]
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name = "libcortex_a9"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
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dependencies = [
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"bit_field",
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"libregister",
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@ -332,7 +329,6 @@ checksum = "348108ab3fba42ec82ff6e9564fc4ca0247bdccdc68dd8af9764bbc79c3c8ffb"
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[[package]]
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name = "libregister"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
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dependencies = [
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"bit_field",
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"vcell",
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@ -342,7 +338,6 @@ dependencies = [
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[[package]]
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name = "libsupport_zynq"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
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dependencies = [
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"cc",
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"compiler_builtins",
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13
src/Makefile
13
src/Makefile
@ -9,11 +9,18 @@ satman: ../build/satman.bin
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.PHONY: all runtime_target satman_target
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manifests = libboard_artiq/Cargo.toml libc/Cargo.toml libdyld/Cargo.toml libio/Cargo.toml libksupport/Cargo.toml runtime/Cargo.toml satman/Cargo.toml
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$(manifests): %.toml: %.toml.tpl
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sed s+@@ZYNQ_RS@@+$(ZYNQ_RS)+g $< > $@
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manifests: $(manifests)
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../build/pl.rs ../build/rustc-cfg ../build/mem.rs: gateware/*
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mkdir -p ../build
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python gateware/$(TARGET).py -r ../build/pl.rs -c ../build/rustc-cfg -m ../build/mem.rs $(GWARGS)
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../build/firmware/armv7-none-eabihf/release/runtime: ../build/pl.rs ../build/rustc-cfg ../build/mem.rs $(shell find . -type f -print)
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../build/firmware/armv7-none-eabihf/release/runtime: ../build/pl.rs ../build/rustc-cfg ../build/mem.rs $(manifests) $(shell find . -type f -not -name Cargo.toml -print)
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cd runtime && \
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XBUILD_SYSROOT_PATH=`pwd`/../../build/sysroot \
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cargo xbuild --release \
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@ -23,7 +30,7 @@ satman: ../build/satman.bin
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../build/runtime.bin: ../build/firmware/armv7-none-eabihf/release/runtime
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llvm-objcopy -O binary ../build/firmware/armv7-none-eabihf/release/runtime ../build/runtime.bin
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../build/firmware/armv7-none-eabihf/release/satman: ../build/pl.rs ../build/rustc-cfg ../build/mem.rs $(shell find . -type f -print)
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../build/firmware/armv7-none-eabihf/release/satman: ../build/pl.rs ../build/rustc-cfg ../build/mem.rs $(manifests) $(shell find . -type f -not -name Cargo.toml -print)
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cd satman && \
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XBUILD_SYSROOT_PATH=`pwd`/../../build/sysroot \
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cargo xbuild --release \
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@ -31,4 +38,4 @@ satman: ../build/satman.bin
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--no-default-features --features=target_$(TARGET)
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../build/satman.bin: ../build/firmware/armv7-none-eabihf/release/satman
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llvm-objcopy -O binary ../build/firmware/armv7-none-eabihf/release/satman ../build/satman.bin
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llvm-objcopy -O binary ../build/firmware/armv7-none-eabihf/release/satman ../build/satman.bin
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@ -24,8 +24,8 @@ nb = "1.0"
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void = { version = "1", default-features = false }
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io = { path = "../libio", features = ["byteorder"] }
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git"}
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libregister = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libconfig = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["fat_lfn"] }
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libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libasync = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libboard_zynq = { path = "@@ZYNQ_RS@@/libboard_zynq" }
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libregister = { path = "@@ZYNQ_RS@@/libregister" }
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libconfig = { path = "@@ZYNQ_RS@@/libconfig", features = ["fat_lfn"] }
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libcortex_a9 = { path = "@@ZYNQ_RS@@/libcortex_a9" }
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libasync = { path = "@@ZYNQ_RS@@/libasync" }
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@ -6,7 +6,7 @@ edition = "2018"
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build = "build.rs"
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[dependencies]
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libboard_zynq = { path = "@@ZYNQ_RS@@/libboard_zynq" }
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[build-dependencies]
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cc = { version = "1.0.1" }
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[dependencies]
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log = "0.4"
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libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libcortex_a9 = { path = "@@ZYNQ_RS@@/libcortex_a9" }
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@ -11,7 +11,7 @@ path = "lib.rs"
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core_io = { version = "0.1", features = ["collections"] }
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byteorder = { version = "1.0", default-features = false, optional = true }
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libsupport_zynq = { default-features = false, features = ["alloc_core"], git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libsupport_zynq = { path = "@@ZYNQ_RS@@/libsupport_zynq", default-features = false, features = ["alloc_core"] }
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[features]
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alloc = []
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@ -19,16 +19,16 @@ log_buffer = { version = "1.2" }
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libm = { version = "0.2", features = ["unstable"] }
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vcell = "0.1"
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["ipv6"]}
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libsupport_zynq = { default-features = false, features = ["alloc_core"], git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libasync = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libregister = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libconfig = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["fat_lfn", "ipv6"] }
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libboard_zynq = { path = "@@ZYNQ_RS@@/libboard_zynq", features = ["ipv6"]}
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libsupport_zynq = { path = "@@ZYNQ_RS@@/libsupport_zynq", default-features = false, features = ["alloc_core"] }
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libcortex_a9 = { path = "@@ZYNQ_RS@@/libcortex_a9" }
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libasync = { path = "@@ZYNQ_RS@@/libasync" }
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libregister = { path = "@@ZYNQ_RS@@/libregister" }
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libconfig = { path = "@@ZYNQ_RS@@/libconfig", features = ["fat_lfn", "ipv6"] }
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dyld = { path = "../libdyld" }
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dwarf = { path = "../libdwarf" }
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unwind = { path = "../libunwind" }
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libc = { path = "../libc" }
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io = { path = "../libio" }
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libboard_artiq = { path = "../libboard_artiq" }
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libboard_artiq = { path = "../libboard_artiq" }
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@ -27,12 +27,12 @@ async-recursion = "0.3"
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log_buffer = { version = "1.2" }
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vcell = "0.1"
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["ipv6"]}
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libsupport_zynq = { default-features = false, features = ["alloc_core"], git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libasync = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libregister = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libconfig = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["fat_lfn", "ipv6"] }
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libboard_zynq = { path = "@@ZYNQ_RS@@/libboard_zynq", features = ["ipv6"]}
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libsupport_zynq = { path = "@@ZYNQ_RS@@/libsupport_zynq", default-features = false, features = ["alloc_core"] }
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libcortex_a9 = { path = "@@ZYNQ_RS@@/libcortex_a9" }
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libasync = { path = "@@ZYNQ_RS@@/libasync" }
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libregister = { path = "@@ZYNQ_RS@@/libregister" }
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libconfig = { path = "@@ZYNQ_RS@@/libconfig", features = ["fat_lfn", "ipv6"] }
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dyld = { path = "../libdyld" }
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dwarf = { path = "../libdwarf" }
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@ -18,12 +18,12 @@ core_io = { version = "0.1", features = ["collections"] }
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cslice = "0.3"
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embedded-hal = "0.2"
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["ipv6"]}
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libsupport_zynq = { default-features = false, features = ["alloc_core"], git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libasync = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libregister = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libconfig = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["fat_lfn", "ipv6"] }
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libboard_zynq = { path = "@@ZYNQ_RS@@/libboard_zynq", features = ["ipv6"]}
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libsupport_zynq = { path = "@@ZYNQ_RS@@/libsupport_zynq", default-features = false, features = ["alloc_core"] }
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libcortex_a9 = { path = "@@ZYNQ_RS@@/libcortex_a9" }
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libasync = { path = "@@ZYNQ_RS@@/libasync" }
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libregister = { path = "@@ZYNQ_RS@@/libregister" }
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libconfig = { path = "@@ZYNQ_RS@@/libconfig", features = ["fat_lfn", "ipv6"] }
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libboard_artiq = { path = "../libboard_artiq" }
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unwind = { path = "../libunwind" }
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