diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py
index f5005b9..071fa94 100755
--- a/src/gateware/zc706.py
+++ b/src/gateware/zc706.py
@@ -82,7 +82,7 @@ class ZC706(SoCCore):
         platform.add_platform_command("create_clock -name clk_fpga_0 -period 8 [get_pins \"PS7/FCLKCLK[0]\"]")
         platform.add_platform_command("set_input_jitter clk_fpga_0 0.24")
 
-        self.config["HAS_SI5324"] = None
+        self.rustc_cfg["HAS_SI5324"] = None
         self.submodules.si5324_rst_n = gpio.GPIOOut(platform.request("si5324").rst_n)
         self.csr_devices.append("si5324_rst_n")