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@ -136,7 +136,6 @@ def prepare_zc706_platform(platform): |
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platform.add_platform_command("create_clock -name clk_fpga_0 -period 8 [get_pins \"PS7/FCLKCLK[0]\"]") |
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platform.add_platform_command("set_input_jitter clk_fpga_0 0.24") |
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return platform |
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class ZC706(SoCCore): |
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@ -145,7 +144,7 @@ class ZC706(SoCCore): |
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self.rustc_cfg = dict() |
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platform = zc706.Platform() |
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platform = prepare_zc706_platform(platform) |
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prepare_zc706_platform(platform) |
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ident = self.__class__.__name__ |
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if self.acpki: |
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@ -199,7 +198,7 @@ class _MasterBase(SoCCore): |
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self.rustc_cfg = dict() |
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platform = zc706.Platform() |
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platform = prepare_zc706_platform(platform) |
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prepare_zc706_platform(platform) |
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ident = self.__class__.__name__ |
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if self.acpki: |
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ident = "acpki_" + ident |
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@ -337,7 +336,7 @@ class _SatelliteBase(SoCCore): |
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self.rustc_cfg = dict() |
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platform = zc706.Platform() |
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platform = prepare_zc706_platform(platform) |
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prepare_zc706_platform(platform) |
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ident = self.__class__.__name__ |
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if self.acpki: |
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ident = "acpki_" + ident |
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